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TAS5028 Datasheet(PDF) 45 Page - Texas Instruments |
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TAS5028 Datasheet(HTML) 45 Page - Texas Instruments |
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45 / 84 page  Electrical Specifications 37 SLES112 — June 2004 TAS5028 3.6.2 Serial Audio Port 3.6.2.1 Serial Audio Ports Slave Mode Over Recommended Operating Conditions (Unless Otherwise Noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS fSCLKIN Frequency, SCLK 64 x fs CL = 30 pF 2.048 12.288 MHz tsu1 Setup time, LRCLK to SCLK rising edge 10 ns th1 Hold time, LRCLK from SCLK rising edge 10 ns tsu2 Setup time, SDIN to SCLK rising edge 10 ns th2 Hold time, SDIN from SCLK rising edge 10 ns LRCLK frequency 32 48 192 kHz SCLK duty cycle 40% 50% 60% LRCLK duty cycle 40% 50% 60% SCLK rising edges between LRCLK rising edges 64 64 SCLK edges LRCLK clock edge with respect to the falling edge of SCLK - 1/4 1/4 SCLK period th1 tsu1 tsu2 th2 SCLK (Input) LRCLK (Input) SDIN1 SDIN2 SDIN3 Figure 3 - 1. Slave Mode Serial Data Interface Timing |
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