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TAS5028 Datasheet(PDF) 65 Page - Texas Instruments |
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TAS5028 Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 84 page ![]() Serial Control Interface Register Definitions 57 SLES112 — June 2004 TAS5028 6.11 Automute PWM Threshold and Backend Reset Period (0x15) Table 6 - 11. Automute PWM Threshold and Backend Reset Period D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 0 0 0 - - - - Set PWM automute threshold equals input automute threshold 0 0 0 1 - - - - Set PWM automute threshold 1 bit more than input automute threshold 0 0 1 0 - - - - Set PWM automute threshold 2 bits more than input automute threshold 0 0 1 1 - - - - Set PWM automute threshold 3 bits more than input automute threshold 0 1 0 0 - - - - Set PWM automute threshold 4 bits more than input automute threshold 0 1 0 1 - - - - Set PWM automute threshold 5 bits more than input automute threshold 0 1 1 0 - - - - Set PWM automute threshold 6 bits more than input automute threshold 0 1 1 1 - - - - Set PWM automute threshold 7 bits more than input automute threshold 1 0 0 0 - - - - Set PWM automute threshold equals input automute threshold 1 0 0 1 - - - - Set PWM automute threshold 1 bit less than input automute threshold 1 0 1 0 - - - - Set PWM automute threshold 2 bits less than input automute threshold 1 0 1 1 - - - - Set PWM automute threshold 3 bits less than input automute threshold 1 1 0 0 - - - - Set PWM automute threshold 4 bits less than input automute threshold 1 1 0 1 Set PWM automute threshold 5 bits less than input automute threshold 1 1 1 0 Set PWM automute threshold 6 bits less than input automute threshold 1 1 1 1 Set PWM automute threshold 7 bits less than input automute threshold - - - - 0 0 0 0 Set backend reset period < 1 ms - - - - 0 0 0 1 Set backend reset period 1 ms - - - - 0 0 1 0 Set backend reset period 2 ms - - - - 0 0 1 1 Set backend reset period 3 ms - - - - 0 1 0 0 Set backend reset period 4 ms - - - - 0 1 0 1 Set backend reset period 5 ms - - - - 0 1 1 0 Set backend reset period 6 ms - - - - 0 1 1 1 Set backend reset period 7 ms - - - - 1 0 0 0 Set backend reset period 8 ms - - - - 1 0 0 1 Set backend reset period 9 ms - - - - 1 0 1 0 Set backend reset period 10 ms - - - - 1 0 1 1 Set backend reset period 10 ms - - - - 1 1 X X Set backend reset period 10 ms 6.12 Modulation Index Limit Register (0x16) Table 6 - 12. Modulation Index Limit Register D7 D6 D5 D4 D3 D2 D1 D0 LIMIT [DCLKS] MIN WIDTH [DCLKS] MODULATION INDEX 0 0 0 1 2 99.2% 0 0 1 2 4 98.4% 0 1 0 3 6 97.7% 0 1 1 4 8 96.9% 1 0 0 5 10 96.1% 1 0 1 6 12 95.3% 1 1 0 7 14 94.5% 1 1 1 8 16 93.8% |
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