PCF8820 datasheet(11/60 Pages) PHILIPS

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MGT117

state1

state2

N11

N12

N13

N14

N21

Frame

012

VLCD

0.5VLCD

−0.5VLCD

VSS

ROW 0

R0(t)

VLCD

VSS

ROW 1

R1(t)

0 V

VLCD

−VLCD

Vstate2(t)

0 V

VLCD

−VLCD

Vstate1(t)

VLCD

VSS

COL 0

C0(t)

VLCD

VSS

COL 1

C1(t)

Fig.5 Typical LCD driver waveforms at a multiplex rate of 1 : 8, for partial screen mode and bias system 1/2.

Vstate1(t) = C1(t) − R0(t).

Vstate2(t) = C1(t) − R1(t).

Example for setting grey-scale register.

ROW0, COL0: GS = 0

ROW1, COL0: GS = 63 (63 will be set to 64; see Section 8.1.8).

ROW0, COL1: GS = 63 (63 will be set to 64; see Section 8.1.8).

ROW1, COL0: GS = 63 (63 will be set to 64; see Section 8.1.8).

PCF8820 Datasheet(PDF) 11 Page - NXP Semiconductors

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