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PCF8820 Datasheet(PDF) 17 Page - NXP Semiconductors

Part # PCF8820
Description  67 x 101 Grey-scale/ECB colour dot matrix LCD driver
PDF  60 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCF8820 Datasheet(HTML) 17 Page - NXP Semiconductors

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2000 Dec 07
17
Philips Semiconductors
Product specification
67
× 101 Grey-scale/ECB colour dot matrix
LCD driver
PCF8820
7.18.5
I2C-BUS PROTOCOL
The PCF8820 is a slave transmitter/receiver. If data is to
be read from the device, the SDA_OUT output must be
used.
Before any data is transferred over the I2C-bus, the
destination device is addressed first (see Fig.15).
The PCF8820 has four 7-bit slave addresses reserved:
0111 100, 0111 101, 0111 110 and 0111 111. The two
least significant bits of the slave address are set by
connecting slave address inputs SA1 and SA0 to either
VSS1 (logic 0) or VDD1 (logic 1).
A write sequence (see Fig.17) is initiated with a START
condition (S) from the I2C-bus master which is followed by
the slave address. Only the addressed slave
acknowledges. After acknowledgement, one or more
command words follow which define the status of the
addressed slave.
A command word consists of a control byte (see Fig.16)
defining ‘continuation’ bit Co and ‘register selection’
bit RS, plus a data byte. The last control byte is indicated
by resetting bit Co = 0. The control and data bytes are also
acknowledged by all addressed slaves on the bus.
Depending on the setting of bit RS in the last control byte,
either a series of display data bytes or command data
bytes may follow.
If bit RS = 1, the data bytes are stored as display data in
the DDRAM at the address specified by the data pointer.
The data pointer is automatically incremented.
If bit RS = 0, the data byte is interpreted as a command
byte to be decoded and the device will be set according to
the received commands.
Only the addressed PCF8820 acknowledges after each
byte is received. The I2C-bus master issues a stop
condition (P) at the end of the transmission.
MGU185
S
01111
SA0
SA1
A
slave address
R/W
acknowledge
bit
START
condition
slave
address
bit 1
read/write
bit
slave
address
bit 0
Fig.15 Slave address.
MGT124
Co
RS
XXXXXX
control byte
register
selection
bit
continuation
bit
Fig.16 Control byte.
handbook, full pagewidth
MGT125
S 01111
S
A
0
S
A
1
0A
acknowledgement
from PCF8820
acknowledgement
from PCF8820
acknowledgement
from PCF8820
acknowledgement
from PCF8820
acknowledgement
from PCF8820
1
control byte
A
data byte
data byte
m
≥ 0 bytes
1 byte
slave address
2n
≥ 0 bytes
A
Co
update
data pointer
Co
0A
A P
RS
R/W
control byte
RS
Fig.17 Write sequence: master transmits bytes to slave receiver.



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