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PCF8820 Datasheet(PDF) 15 Page - NXP Semiconductors |
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PCF8820 Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 60 page ![]() 2000 Dec 07 15 Philips Semiconductors Product specification 67 × 101 Grey-scale/ECB colour dot matrix LCD driver PCF8820 7.18 I2C-bus interface The I2C-bus allows bidirectional data communication between different ICs or modules. The serial data input line and serial data output line are connected together, so representing the Serial Data (SDA) line. See Section 13.4 for layout considerations. The SDA line and the Serial Clock Line (SCL) line must be connected to a positive supply voltage via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. 7.18.1 BIT TRANSFER One data bit is transferred during a clock pulse period. The data on the SDA line must remain stable during the HIGH period of the clock pulse, otherwise any change in the data within this period will be interpreted as a control signal (see Fig.11). 7.18.2 START AND STOP CONDITIONS Both data and clock lines are HIGH when the bus is not busy (see Fig.12). A START condition (S) occurs when the data line goes from HIGH-to-LOW while the clock is HIGH. A STOP condition (P) occurs when the data line goes from LOW-to-HIGH while the clock is HIGH. handbook, full pagewidth MBC621 data line stable; data valid change of data allowed SDA SCL Fig.11 Bit transfer. handbook, full pagewidth MBC622 SDA SCL P STOP condition SDA SCL S START condition Fig.12 Definition of START and STOP conditions. |
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