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PCF8820 Datasheet(PDF) 21 Page - NXP Semiconductors |
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PCF8820 Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 60 page ![]() 2000 Dec 07 21 Philips Semiconductors Product specification 67 × 101 Grey-scale/ECB colour dot matrix LCD driver PCF8820 8.1 Description of the bit functions Table 3 Instruction set bit functions BIT RESET STATE VALUE FUNCTION D7 to D0 −− data to be written to DDRAM TR7 to TR0 −− read-out value of sensor temperature H2 to H0 command page numbers 000 000 function and RAM 001 display setting 010 high voltage generator setting 011 grey-scale/colour 100 special features DO data order when written to DDRAM 0 0 normal (see Fig.6) 1 swapped: DB7 <-> DB0, DB6 <-> DB1, etc. PD operation mode 0 operating mode 1 1 Power-down mode; see Section 8.1.1 V address mode 0 0 horizontal address mode: data is written to DDRAM (see Fig.10) 1 vertical address mode: data is written to DDRAM (see Fig.9) Y4 to Y0 0 − Y-address of the DDRAM points to the rows; the address range is from 0 to 16 (10H); see Section 8.1.3 X6 to X0 0 − X-address of the DDRAM points to the columns; the address range is from 0 to 100 (64H) D, E display mode 00 00 display blank: using the value in grey-scale register 0 01 all display segments on: using the value in grey-scale register 3 10 normal mode: using the values of the four grey-scale registers appropriate to the RAM data 11 inverse video: using the values in all four grey-scale registers as in normal mode but with their values swapped (GS0 and GS3 values transposed, GS1 and GS2 values transposed) MX horizontal address space mirroring; see Figs 7 and 8; see Table 10 0 0 disabled: data to DDRAM is written from left (X = 0) to right (X = 100) 1 enabled: data to DDRAM is written from right (X = 0) to left (X = 100) MY vertical address space mirroring; see Table 10 0 0 disabled: normal display 1 enabled: data is immediately mirrored vertically on the LCD. The status of bit MY takes effect when data is read from the DDRAM and when generating column signals. |
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