Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

RT600 Datasheet(PDF) 167 Page - NXP Semiconductors

Part # RT600
Description  Dual-core microcontroller with 32-bit Cortex®-M33 and Xtensa HiFi4 Audio DSP CPUs; Up to 4.5 MB SRAM; FlexSPI with cache and dynamic decryption; High-speed USB device/host Phy; 12-bit 1 Msamples/s ADC; Analog Comparator; Audio
PDF  171 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

RT600 Datasheet(HTML) 167 Page - NXP Semiconductors

Back Button RT600 Datasheet HTML 163Page - NXP Semiconductors RT600 Datasheet HTML 164Page - NXP Semiconductors RT600 Datasheet HTML 165Page - NXP Semiconductors RT600 Datasheet HTML 166Page - NXP Semiconductors RT600 Datasheet HTML 167Page - NXP Semiconductors RT600 Datasheet HTML 168Page - NXP Semiconductors RT600 Datasheet HTML 169Page - NXP Semiconductors RT600 Datasheet HTML 170Page - NXP Semiconductors RT600 Datasheet HTML 171Page - NXP Semiconductors  
Zoom Inzoom in Zoom Outzoom out
 167 / 171 page
background image
RT600
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors B.V. 2024. All rights reserved.
Product data sheet
Rev. 2.2 — 25 January 2024
167 of 173
NXP Semiconductors
RT600
Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4
Audio DSP CPUs
22. Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1
1.1
Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2
Shared system SRAM . . . . . . . . . . . . . . . . . . . 2
2
Features and benefits . . . . . . . . . . . . . . . . . . . . 2
3
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Ordering information. . . . . . . . . . . . . . . . . . . . . 8
4.1
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Pinning information. . . . . . . . . . . . . . . . . . . . . 15
8
Power Supply for pins. . . . . . . . . . . . . . . . . . . 51
9
Termination of unused pins . . . . . . . . . . . . . . 52
9.0.1
Pin states in different power modes . . . . . . . 52
10
Functional description . . . . . . . . . . . . . . . . . . 53
10.1
Architectural overview . . . . . . . . . . . . . . . . . . 53
10.2
Arm Cortex-M33 processor. . . . . . . . . . . . . . . 53
10.3
Arm Cortex-M33 integrated Floating Point Unit
(FPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
10.4
Xtensa HiFi 4 advanced Audio Digital Signal
Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
10.5
Memory Protection Unit (MPU). . . . . . . . . . . . 54
10.6
Nested Vectored Interrupt Controller (NVIC) for
Cortex-M33. . . . . . . . . . . . . . . . . . . . . . . . . . . 54
10.6.1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
10.6.2
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 54
10.7
System Tick timer (SysTick) . . . . . . . . . . . . . . 54
10.8
PowerQuad Hardware Accelerator . . . . . . . . . 54
10.9
On-chip static RAM. . . . . . . . . . . . . . . . . . . . . 55
10.10
On-chip ROM . . . . . . . . . . . . . . . . . . . . . . . . . 55
10.11
OTP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
10.12
Memory mapping . . . . . . . . . . . . . . . . . . . . . . 55
10.12.1 AHB multilayer matrix . . . . . . . . . . . . . . . . . . . 55
10.12.2 Memory Protection Unit (MPU). . . . . . . . . . . . 55
10.12.3 TrustZone and Cortex-M33 busing on this device
56
10.12.4 Links to specific memory map descriptions and
tables: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
10.12.5 Device overview . . . . . . . . . . . . . . . . . . . . . . . 58
10.12.6 Cortex-M33 Memory overview . . . . . . . . . . . . 60
10.12.7 Shared RAM detail . . . . . . . . . . . . . . . . . . . . . 61
10.12.8 APB peripherals . . . . . . . . . . . . . . . . . . . . . . . 63
10.12.9 AHB peripherals . . . . . . . . . . . . . . . . . . . . . . . 64
10.12.10 HiFi 4 memory map . . . . . . . . . . . . . . . . . . . . 66
10.12.10.1 Using cacheable and non-cacheable memory
regions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
10.13
System control . . . . . . . . . . . . . . . . . . . . . . . . 67
10.13.1 Clock sources . . . . . . . . . . . . . . . . . . . . . . . . . 67
10.13.1.1 12 MHz Free Running Oscillator (FRO) . . . . . 67
10.13.1.2 48/60 MHz Free Running Oscillator (FRO). . . 67
10.13.1.3 1 MHz Low-Power oscillator . . . . . . . . . . . . . 68
10.13.1.4 Crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . 68
10.13.1.5 32 kHz oscillator . . . . . . . . . . . . . . . . . . . . . . . 68
10.13.2 System PLL (PLL0). . . . . . . . . . . . . . . . . . . . . 68
10.13.3 Audio PLL (PLL2) . . . . . . . . . . . . . . . . . . . . . . 68
10.13.4 Clock Generation . . . . . . . . . . . . . . . . . . . . . 69
10.13.5 Safety. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
10.14
Power control . . . . . . . . . . . . . . . . . . . . . . . . . 72
10.14.1 Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 72
10.14.2 Deep-sleep mode. . . . . . . . . . . . . . . . . . . . . . 72
10.14.3 Deep power-down mode and Full Deep
power-down mode . . . . . . . . . . . . . . . . . . . . . 72
10.14.4 Peripheral configuration in reduced power modes
73
10.15
General Purpose I/O (GPIO) . . . . . . . . . . . . . 75
10.15.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
10.16
Pin interrupt/pattern engine . . . . . . . . . . . . . . 75
10.16.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
10.17
Communications peripherals . . . . . . . . . . . . . 76
10.17.1 High-speed USB Host/Device interface (USB1) .
76
10.17.1.1 USB1 device controller . . . . . . . . . . . . . . . . . 76
10.17.1.2 USB1 host controller . . . . . . . . . . . . . . . . . . . 77
10.17.2 FlexSPI Flash Inerface. . . . . . . . . . . . . . . . . . 77
10.17.2.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
10.17.3 SD/eMMC Interfaces . . . . . . . . . . . . . . . . . . . 78
10.17.4 Flexcomm Interface serial communication. . . 78
10.17.4.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
10.17.4.2 SPI serial I/O controller (Flexcomm Interfaces 0 -
7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
10.17.4.3 I2C-bus interface . . . . . . . . . . . . . . . . . . . . . . 79
10.17.4.4 USART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10.17.4.5 I2S-bus interface . . . . . . . . . . . . . . . . . . . . . . 80
10.17.5 High-Speed SPI interface (Flexcomm Interface
14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
10.17.6 I3C interface. . . . . . . . . . . . . . . . . . . . . . . . . . 81
10.17.6.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
10.18
Counter/timer peripherals . . . . . . . . . . . . . . . 81
10.18.1 General-purpose 32-bit timers/external event
counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
10.18.1.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
10.18.2 SCTimer/PWM . . . . . . . . . . . . . . . . . . . . . . . . 82
10.18.2.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
10.18.3 Windowed WatchDog Timer (WWDT) . . . . . . 83
10.18.3.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
10.18.4 Real Time Clock (RTC) timer . . . . . . . . . . . . . 84
10.18.5 Multi-Rate Timer (MRT) . . . . . . . . . . . . . . . . . 84
10.18.5.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
10.18.6 OS/Event Timer . . . . . . . . . . . . . . . . . . . . . . . 84
10.18.6.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
10.18.7 Micro-Tick Timer. . . . . . . . . . . . . . . . . . . . . . . 85
10.18.7.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
10.19
Other digital peripherals. . . . . . . . . . . . . . . . . 85
10.19.1 DMA controller . . . . . . . . . . . . . . . . . . . . . . . . 85
10.19.1.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
10.19.2 DMIC subsystem . . . . . . . . . . . . . . . . . . . . . . 85
10.19.2.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
10.19.3 CRC engine . . . . . . . . . . . . . . . . . . . . . . . . . . 86
10.19.3.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
10.20
Analog peripherals . . . . . . . . . . . . . . . . . . . . . 86
10.20.1 12-bit Analog-to-Digital Converter (ADC). . . . 86



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com