RT600 datasheet(110/171 Pages) NXP

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RT600

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Product data sheet

Rev. 2.2 — 25 January 2024

110 of 173

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

14.8 I2C-bus

[1] Guaranteed by design. Not tested in production.

[2] Parameters are valid over operating temperature range unless otherwise specified. See the I2C-bus specification UM10204 for details.

[3] tHD;DAT is the data hold time that is measured from the falling edge of SCL; applies to data in transmission and the acknowledge.

[4] Ensure SCL drops below 0.3VDD on falling edge before SDA crosses into the indeterminate range of 0.3 VDD to 0.7 VDD.

NOTE: For controllers that cannot observe the SCL falling edge then independent measurement of the time for the SCL transition from

static high (VDD) to 0.3 VDD should be used to insert a delay of the SDA transition with respect to SCL.

[5] The maximum tHD;DAT could be 3.45 s and 0.9 s for Standard-mode and Fast-mode but must be less than the maximum of tVD;DAT or

tVD;ACK by a transition time. This maximum must only be met if the device does not stretch the LOW period (tLOW) of the SCL signal. If

the clock stretches the SCL, the data must be valid by the set-up time before it releases the clock.

[6] tSU;DAT is the data set-up time that is measured with respect to the rising edge of SCL; applies to data in transmission and the

acknowledge.

[7] A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system but the requirement tSU;DAT = 250 ns must then be met.

This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the

LOW period of the SCL signal, it must output the next data bit to the SDA line tr(max) + tSU;DAT = 1000 + 250 = 1250 ns (according to the

Standard-mode I2C-bus specification) before the SCL line is released. Also the acknowledge timing must meet this set-up time.

[8] The MSTTIME register allows programming of certain times for the clock (SCL) high and low times. Please see RT600 user manual

UM11147 for further details.

[9] Fall-time spec can be found in Table 30 “Static characteristics: pin characteristics”.

Table 40. Dynamic characteristic: I2C-bus pins[1]

Tamb = 0 C to +85 C; 1.71 V to 3.6 V.[2]

Symbol Parameter

Conditions

Min

Max

Unit

fSCL

SCL clock frequency

Standard-mode

100

kHz

Fast-mode

400

kHz

Fast-mode Plus

MHz

tLOW

LOW period of the SCL clock

[8]

Standard-mode

4.7



Fast-mode

1.3



Fast-mode Plus

0.5



tHIGH

HIGH period of the SCL clock

[8]

Standard-mode

4.0



Fast-mode

0.6



Fast-mode Plus

0.26



tHD;DAT

data hold time

[3][4][5]

Standard-mode



Fast-mode



Fast-mode Plus



tSU;DAT

data set-up time

[6][7]

Standard-mode

250

Fast-mode

100

Fast-mode Plus

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