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DSP56857E Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc |
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DSP56857E Datasheet(HTML) 31 Page - Freescale Semiconductor, Inc |
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31 / 53 page ![]() Host Interface Port 56857 Technical Data, Rev. 6 Freescale Semiconductor 31 4.7 Host Interface Port Table 4-8 Host Interface Port Timing1 Operating Conditions: VSS = VSSIO = VSSA = 0 V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL ≤ 50pF, fop = 120MHz 1. The formulas: T = clock cycle. f ipb = 60MHz, T = 16.7ns. Characteristic Symbol Min Max Unit See Figure Access time TACKDV —13 ns 4-19 Disable time TACKDZ 3— ns 4-19 Time to disassert TACKREQH 3.5 9 ns 4-19 4-22 Lead time TREQACKL 0— ns 4-19 4-22 Access time TRADV —13 ns 4-20 4-21 Disable time TRADX 5— ns 4-20 4-21 Disable time TRADZ 3— ns 4-20 4-21 Setup time TDACKS 3— ns 4-22 Hold time TACKDH 1— ns 4-22 Setup time TADSS 3— ns 4-23 4-24 Hold time TDSAH 1— ns 4-23 4-24 Pulse width TWDS 5— ns 4-23 4-24 Time to re-assert 1. After second write in 16-bit mode 2. After first write in 16-bit mode or after write in 8-bit mode TACKREQL 4T + 5 5 5T + 9 13 ns ns 4-19 4-22 |
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