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DSP56857E Datasheet(PDF) 50 Page - Freescale Semiconductor, Inc |
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DSP56857E Datasheet(HTML) 50 Page - Freescale Semiconductor, Inc |
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50 / 53 page  56857 Technical Data, Rev. 6 50 Freescale Semiconductor • Take special care to minimize noise levels on the VDDA and VSSA pins. • When using Wired-OR mode on the SPI or the IRQx pins, the user must provide an external pull-up device. • Designs that utilize the TRST pin for JTAG port or Enhance OnCE module functionality (such as development or debugging systems) should allow a means to assert TRST whenever RESET is asserted, as well as a means to assert TRST independently of RESET. Designs that do not require debugging functionality, such as consumer products, should tie these pins together. • The internal POR (Power on Reset) will reset the part at power on with reset asserted or pulled high but requires that TRST be asserted at power on. |
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