| Electronic Components Datasheet Search |
|
DSP56857E Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
DSP56857E Datasheet(HTML) 18 Page - Freescale Semiconductor, Inc |
|
18 / 53 page ![]() 56857 Technical Data, Rev. 6 18 Freescale Semiconductor 70 SC11 GPIOD4 Input/Output Input/Output ESSI Serial Control Pin 1 (SC11)—The function of this pin is determined by the selection of either synchronous or asynchronous mode. For asynchronous mode, this pin is the receiver frame sync I/O. For synchronous mode, this pin is used either for transmitter2 output or for serial I/O flag 1. Port D GPIO (4)—This pin is a General Purpose I/O (GPIO) pin when the ESSI is not in use. 71 SC12 GPIOD5 Input/Output Input/Output ESSI Serial Control Pin 2 (SC12)—This pin is used for frame sync I/O. SC02 is the frame sync for both the transmitter and receiver in synchronous mode and for the transmitter only in asynchronous mode. When configured as an output, this pin is the internally generated frame sync signal. When configured as an input, this pin receives an external frame sync signal for the transmitter (and the receiver in synchronous operation). Port D GPIO (5)—This pin is a General Purpose I/O (GPIO) pin when the ESSI is not in use. 1MISO GPIOF0 Input/Output Input/Output SPI Master In/Slave Out (MISO)—This serial data pin is an input to a master device and an output from a slave device. The MISO line of a slave device is placed in the high-impedance state if the slave device is not selected. The driver on this pin can be configured as an open-drain driver by the SPI’s Wired-OR mode (WOM) bit when this pin is configured for SPI operation. Port F GPIO (0)—This pin is a General Purpose I/O (GPIO) pin that can individually be programmed as input or output pin. 2MOSI GPIOF1 Input/ Output (Z) Input/Output SPI Master Out/Slave In (MOSI)—This serial data pin is an output from a master device and an input to a slave device. The master device places data on the MOSI line a half-cycle before the clock edge that the slave device uses to latch the data. The driver on this pin can be configured as an open-drain driver by the SPI’s WOM bit when this pin is configured for SPI operation. Port F GPIO (1)—This pin is a General Purpose I/O (GPIO) pin that can be individually programmed as input or output pin. Table 3-1 56857 Signal and Package Information for the 100-pin LQFP (Continued) Pin No. Signal Name Type Description |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |