33389 datasheet(29/49 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33389

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

Sleep Mode Activation

Once in the Sleep mode, the SBC turns the V1 and V2

regulator OFF . Thus the microcontroller can not run any

mode.

In order to have the microcontroller run again, the SBC

should enable and turn ON V1. This is achieved by an SBC

wake-up event.

Several options are available to wake-up the SBC and the

application and have the microcontroller in Run mode.

Some wake-ups are selectable; some are always active in

Sleep mode:

• Wake-up from CAN interface and wake-up from SPI (CS)

are always active.

• Wake-up from L0,L1, and L2 inputs, with and without cyclic

sense and the forced wake-up (FWU) are selectable. The

selection must be done while the SBC is in Normal or

Stand-by mode, and prior to enter Sleep mode.

General Condition to Enter Sleep Mode

All previous wake-up conditions must be cleared, assuring

the SBC enters the Sleep mode, and Write operations into

the MCR and MCVR. To clear a wake-up condition requires

reading the appropriate register.

Once the SBC has powered-up from zero (battery power-

up or cold start), the following registers must be read:

• WUICR—possible wake-up event report from CAN bus

• RSR—report a V1 under voltage

• VSSR—reports a VBAT fail flag

Once these read operations are completed, the wake-up

conditions, or flags are reset.

The VBSR0 bit in the VSSR can be used to determine if

the SBC has experienced a loss of battery voltage.

Once the SBC is awakened from Sleep mode the following

registers indicate the wake-up source. They must be cleared

to allow the SBC to enter Sleep mode again:

• WUICR—wake-up event report for CAN or SPI buses

• WUISR— wake-up event report for the L0,L1, and L2

inputs

• RSR—report a V1 under voltage

• VSSR—reports a VBAT fail flag

•etc.

The ensuing paragraphs describe the write operation to be

accomplished for the several Sleep modes and Wake-up

control options.

In addition to FWU, cyclic sense and direct wake-up, the

CAN and SPI wake will always be activated.

Sleep Mode with CAN and SPI Wake-Up

To enter the Sleep mode and activate the only CAN or SPI

wake-up, there is no dedicated wake-up condition to be

completed. The SBC has CAN and SPI wake-up sources

always active in the Sleep mode. To enter the Sleep mode in

this case, while the SBC is in Normal or Stand-by mode:

• Write to V3R—data 0000 (this clears the WI2V3 bit, is set

to1after reset)

• Write to MCR—data SLEEP (100)

• Write to MCVR—data SLEEP (100)

The SBC then enters the Sleep mode.

Sleep Mode Enter with Forced Wake-Up

To enter the Sleep mode and activate the forced wake-up,

write to the following registers:

• Write to V3R (data 0100) this set the FWU bit to 1

• Write the desired wake-up time to CYTCR. (This sets the

time the SBC will stay in the Sleep mode).

• Write to MCR–data SLEEP (100)

• Write to MCVR– data SLEEP (100)

The SBC then enters the Sleep mode. It will wake-up after

the time period is selected in the CYTCR.

Sleep Mode Enter with Cyclic Sense

To enter the Sleep mode and activate the cyclic sense

wake-up the following registers must be written:

• Write to V3R (data 1010) this sets the VI2V3 and CYS bits

to 1

• Write to CYTCR the desired cyclic sense period. (This sets

the time the SBC will wait in the Sleep mode to turn on V3

and sense the LX inputs)

• Write to WUICR bits 0 and 1 to select the edge sensitivity

for the LX inputs

• Write to MCR—data SLEEP (100)

• Write to MCVR—data SLEEP (100)

The SBC then enters the Sleep mode. It will periodically

turn on V3 and while V3 is on, sample the level of the Ls

inputs.

If any of the 3 LX inputs is in the correct state for two

consecutive samples, SBC will wake-up. If not, it will stay in

the Sleep mode. Refer to device description for detail.

Sleep Mode Enter With Direct LX Input Wake-Up

To enter the Sleep mode and activate the direct wake-up

from the LX inputs, the following registers must be written:

• Write to V3R (data 0000) this clear VI2V3 bit

• Write to WUICR bits 0 and 1 to select the edge sensitivity

for the LX inputs

• Write to MCR—data SLEEP (100)

• Write to MCVR—data SLEEP (100)

The SBC then enters the Sleep mode. It will wake-up as

soon as any of the LX input read the correct state.

33389 Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

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