33389 datasheet(35/49 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33389

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

This register configures the state of V3 high-side switch in Normal and Stand-by modes, and the V3 operation and the Forced

wake-up or the cyclic sense option for the sleep mode operation.

In low power modes, cyclic sense has priority. A reset of the register occurs when RST = low.

This register is used to select the cyclic sense or force wake-up timing.

Table 18. Mode Control Validating Register (MCVR)

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MCVR

$003

MSVR2

MSVR1

MSVR0

MCR2

MCR1

MCR0

RESET

—

Table 19. MCR and MCVR Bit Definition

MC(V)R2

MC(V)R1

MC(V)R0

—

MSR2

MSR1

MSR0

Automatically Entered After Reset

Normal Request

Normal

Stand-by

Sleep

Emergency

Table 20. V3 Control Register (V3R)

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

V3R

$005

WI2V3

FWU

CYS

V3R0

RESET

—

Table 21. V3R Bit Definition

WI2V3

FWU

CYS

V3R0

—

Comments

V3 OFF

Only in Normal and Stand-by Mode

Available

V3 ON

Cyclic Sense ON

—

Forced Wake-Up ON

Only in Sleep Mode Available

Wake-Up Inputs Linked to V3

Table 22. Cyclic Timing Control Register (CYTCR)

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

CYTCR

$006

CYTCR2

CYTCR1

CYTCR0

RESET

—

33389 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc

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