33389 datasheet(17/49 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33389

FUNCTIONAL DESCRIPTION

INTRODUCTION

FUNCTIONAL DESCRIPTION

INTRODUCTION

The System Basis Chip (SBC) is an integrated circuit

dedicated to car body applications. It includes three main

blocks:

1. A dual voltage regulator

2. Reset, watchdog, wake-up inputs, cyclic wake-up

3. CAN low speed fault tolerant physical interface

Supplies

Two low drop regulators and one switch to VBAT are

provided to supply the ECU microcontroller or peripherals,

with independent control and monitoring through SPI.

FUNCTIONAL PIN DESCRIPTION

TRANSMIT AND RECEIVE DATA (TX AND RX)

The RX and TX pins (receive data and transmit data pins,

respectively) are connected to a microcontroller’s CAN

protocol handler. TX is an input and controls the CANH and

CANL line state (dominant when TX is LOW, recessive when

TX is HIGH). RX is an output and reports the bus state.

VOLTAGE REGULATOR ONE AND TWO

(V1 AND V2)

The V1 pin is a 3% low drop voltage regulator dedicated to

the microcontroller supply (nominal 5V supply).

The V2 pin is a low drop voltage regulator dedicated to the

peripherals supply (nominal 5V supply).

RESET (RST)

The RST (reset) pin is an input/output pin. The typical

reset duration from SBC to microcontroller is 1ms. If longer

times are required, an external capacitor can be used. SBC

provides two RST output pull-up currents. A typical 30µA pull

up when Vreset is below 2.5V and a 300uA pull up when

reset voltage is higher than 2.5V. RST is also an input for the

SBC. It means the MC33389 is forced to Normal Request

mode after RST is released by the microcontroller

INTERRUPT (INT)

The Interrupt pin INT is an output that is set LOW when an

interrupt occurs. INT is enabled using the Interrupt Register

(INTR). When an interrupt occurs, INT stays LOW until the

interrupt source is cleared.

INT output also reports a wake-up event.

GROUND (GND)

This pin is the ground of the integrated circuit.

MASTER IN/ SLAVE OUT (MISO)

MISO is the Master In Slave Out pin of the serial peripheral

interface. Data is sent from the SBC to the microcontroller

through the MISO pin.

MASTER OUT/ SLAVE IN (MOSI)

MOSI is the Master Out Slave In pin of the serial peripheral

interface. Control data from a microcontroller is received

through this pin.

SYSTEM CLOCK (SCLK)

This pin clocks the internal shift registers for SPI

communication.

CHIP SELECT (CS)

CS is the Chip Select pin of the serial peripheral interface

(SPI). When this pin is LOW, the SPI port of the device is

selected.

LEVEL 0-2 INPUTS (L0: L2)

The L0: L2 pins can be connected to contact switches or

the output of other ICs for external inputs. The input states

can be read by the SPI. These inputs can be used as wake-

up events for the SBC.

NO CONNECT (NC)

No pin connection.

TERMINATION RESISTANCE (HIGH AND LOW?)

(RTH AND RTL)

External CAN bus high and low termination resistance pins

are connected to these pins.

CAN HIGH AND CAN LOW OUTPUTS

(CANH AND CANL)

The CAN High and CAN Low pins are the interfaces to the

CAN bus lines. They are controlled by TX input level, and the

state of CANH and CANL is reported through RX output.

VOLTAGE BATTERY (VBAT)

This pin is the voltage supply from the battery.

VOLTAGE REGULATOR THREE (V3)

This pin is a 10

Ω switch to VBAT, which is used to supply

external contacts or relays.

33389 Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc

33389 Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc

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