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STPMIC25 Datasheet(PDF) 101 Page - STMicroelectronics

Part # STPMIC25
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25 Datasheet(HTML) 101 Page - STMicroelectronics

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6.5.13
LDO4 MAIN mode control register (LDO4_MAIN_CR)
Table 66. LDO4_MAIN_CR
7
6
5
4
3
2
1
0
INPUT_SRC[1:0]
reserved
reserved
reserved
reserved
reserved
EN
R/W
R/W
R
R
R
R
R
R/W
•
Address: 0x55
•
Default: 0b0000000X where X depends on the value programmed in the NVM
•
Description: LDO4 MAIN mode control register.
This register is initialized to the default value in the CHECK&LOAD state. The user can write to these registers to
control enable or to force the power input source of LDO4, which is applied to the MAIN mode (see Section 5.4.6).
[7:6]
INPUT_SRC[1:0]: force power input source
00: automatic input source selection (the higher voltage is automatically selected)
01: supply input source is VIN
10: supply input source is VBUS
11: automatic input source selection (the higher voltage is automatically selected)
[5:1] reserved
[0]
EN:
0: LDO4 is disabled
1: LDO4 is enabled
The default value is defined in the LDO4_RANK[2:0] bit field of the NVM_LDOs_RANK_SHR2 NVM shadow registers. If
LDO4_RANK[2:0] = 0, LDO4 is disabled at power-up. If LDO4_RANK[2:0] = y (with 6 > y > 0), LDO4 is enabled at
power-up at rank y (see Section 5.2)
STPMIC25
Register descriptions
DS14278 - Rev 3
page 101/145



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