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STPMIC25 Datasheet(PDF) 125 Page - STMicroelectronics |
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STPMIC25 Datasheet(HTML) 125 Page - STMicroelectronics |
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125 / 145 page ![]() 6.8.21 NVM LDOs output current limitation shadow register (NVM_LDOS_IOUT_SHR) Table 101. NVM_LDOS_IOUT_SHR 7 6 5 4 3 2 1 0 LDO7_ILIM[1:0] LDO6_ILIM[1:0] LDO5_ILIM[1:0] LDO2_ILIM[1:0] R/W R/W R/W R/W R/W R/W R/W R/W • Address: 0xAE • Default: Depends on the PMIC part number • Description: NVM LDOs output current limitation shadow register. [7:6] LDO7_ILIM[1:0]: output current limitation 00: 50 mA 01: 100 mA 10: 200 mA 11: 400 mA [5:4] LDO6_ILIM[1:0]: output current limitation 00: 50 mA 01: 100 mA 10: 200 mA 11: 400 mA [3:2] LDO5_ILIM[1:0]: output current limitation 00: 50 mA 01: 100 mA 10: 200 mA 11: 400 mA [1:0] LDO2_ILIM[1:0]: output current limitation 00: 50 mA 01: 100 mA 10: 200 mA 11: 400 mA STPMIC25 Register descriptions DS14278 - Rev 3 page 125/145 |
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