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STPMIC25 Datasheet(PDF) 124 Page - STMicroelectronics |
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STPMIC25 Datasheet(HTML) 124 Page - STMicroelectronics |
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124 / 145 page  6.8.20 NVM BUCKs output current limitation shadow register 2 (NVM_BUCKS_IOUT_SHR2) Table 100. NVM_BUCKS_IOUT_SHR2 7 6 5 4 3 2 1 0 HICCUP_DLY[1:0] BUCK7_ILIM[1:0] BUCK6_ILIM[1:0] BUCK5_ILIM[1:0] R/W R/W R/W R/W R/W R/W R/W R/W • Address: 0xAD • Default: Depends on the PMIC part number • Description: NVM BUCKs output current limitation shadow register 2. [7:6] HICCUP_DLY[1:0]: output current limitation 00: 0 ms 01: 100 ms 10: 500 ms 11: 1000 ms [5:4] BUCK7_ILIM[1:0]: output current limitation 00: 1000 mA 01: 1500 mA 10: 2000 mA 11: 2500 mA [3:2] BUCK6_ILIM[1:0]: output current limitation 00: 500 mA 01: 1000 mA 10: 1500 mA 11: 2000 mA [1:0] BUCK5_ILIM[1:0]: output current limitation 00: 250 mA 01: 500 mA 10: 500 mA 11: 500 mA STPMIC25 Register descriptions DS14278 - Rev 3 page 124/145 |
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