STPMIC25APQR datasheet(138/145 Pages) STMICROELECTRONICS

138 / 145 page

6.2.7

Overcurrent protection status register 2 (OCP_SR2)............................. 71

6.2.8

Enable status register 1 (EN_SR1) .......................................... 72

6.2.9

Enable status register 2 (EN_SR2) .......................................... 73

6.2.10

Fail-safe counter status register 1 (FS_CNT_SR1) .............................. 74

6.2.11

Fail-safe counter status register 2 (FS_CNT_SR2) .............................. 74

6.2.12

Fail-safe counter status register 3 (FS_CNT_SR3) .............................. 75

6.2.13

Mode status register (MODE_SR)........................................... 76

6.3

Control registers .............................................................. 77

6.3.1

Main control register (MAIN_CR) ........................................... 77

6.3.2

VINLOW monitoring control register (VINLOW_CR) ............................. 78

6.3.3

PONKEYn long key press control register (PKEY_LKP_CR) ...................... 79

6.3.4

Watchdog control register (WDG_CR) ....................................... 80

6.3.5

Watchdog timer control register (WDG_TMR_CR) .............................. 81

6.3.6

Watchdog timer status register (WDG_TMR_SR) ............................... 81

6.3.7

Fail-safe overcurrent protection control register 1 (FS_OCP_CR1) .................. 82

6.3.8

Fail-safe overcurrent protection control register 2 (FS_OCP_CR2) .................. 83

6.3.9

Pads pull control register (PADS_PULL_CR) .................................. 84

6.3.10

Buck pull-down control register 1 (BUCKS_PD_CR1) ............................ 85

6.3.11

Buck pull-down control register 2 (BUCKS_PD_CR2) ............................ 86

6.3.12

LDO pull-down control register 1 (LDOS_PD_CR1) ............................. 87

6.3.13

LDO pull-down control register 2 (LDOS_PD_CR2) ............................. 88

6.3.14

Mask reset buck control register (BUCKS_MRST_CR) ........................... 89

6.3.15

Mask reset buck control register (BUCKS_MRST_CR) ........................... 90

6.4

Spread spectrum control register (SSMOD_CR).................................... 91

6.5

Power supply control registers................................................... 92

6.5.1

BUCKx MAIN mode control register 1 (BUCKx_MAIN_CR1) (x = 1 to 7) ............. 92

6.5.2

BUCKx MAIN mode control register 2 (BUCKx_MAIN_CR2) (x = 1 to 7) ............. 92

6.5.3

BUCKx ALTERNATE mode control register 1 (BUCKx_ALT_CR1) (x = 1 to 7) ......... 93

6.5.4

BUCKx ALTERNATE mode control register 2 (BUCKx_ALT_CR2) (x = 1 to 7) ......... 93

6.5.5

BUCKx PWRCTRL control register (BUCKx_PWRCTRL_CR) (x = 1 to 7) ............ 94

6.5.6

LDOx MAIN mode control register (LDOx_MAIN_CR) (x = 2/5/6/7/8) ................ 95

6.5.7

LDOx ALTERNATE mode control register (LDOx_ALT_CR) (x = 2/5/6/7/8)............ 96

6.5.8

LDOx PWRCTRL control register (LDOx_PWRCTRL_CR) (x = 1 to 8) ............... 97

6.5.9

LDO1 MAIN mode control register (LDO1_MAIN_CR) ........................... 98

6.5.10

LDO1 ALTERNATE mode control register (LDO1_ALT_CR) ....................... 98

6.5.11

LDO3 MAIN mode control register (LDO3_MAIN_CR) ........................... 99

6.5.12

LDO3 ALTERNATE mode control register (LDO3_ALT_CR) ...................... 100

6.5.13

LDO4 MAIN mode control register (LDO4_MAIN_CR) .......................... 101

STPMIC25

Contents

DS14278 - Rev 3

page 138/145

STPMIC25APQR Datasheet(PDF) 138 Page - STMicroelectronics

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