STPMIC25APQR datasheet(142/145 Pages) STMICROELECTRONICS

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Table 54.

LDOS_MRST_CR .................................................................. 90

Table 55.

BUCKx_MAIN_CR2 ................................................................. 92

Table 56.

BUCKx_ALT_CR1 .................................................................. 93

Table 57.

BUCKx_ALT_CR2 .................................................................. 93

Table 58.

BUCKx_PWRCTRL_CR .............................................................. 94

Table 59.

LDOx_MAIN_CR ................................................................... 95

Table 60.

LDOx_ALT_CR .................................................................... 96

Table 61.

LDOx_PWRCTRL_CR ............................................................... 97

Table 62.

LDO1_MAIN_CR ................................................................... 98

Table 63.

LDO1_ALT_CR .................................................................... 98

Table 64.

LDO3_MAIN_CR ................................................................... 99

Table 65.

LDO3_ALT_CR ................................................................... 100

Table 66.

LDO4_MAIN_CR .................................................................. 101

Table 67.

LDO4_ALT_CR ................................................................... 102

Table 68.

REFDDR_MAIN_CR ............................................................... 103

Table 69.

REFDDR_ALT_CR................................................................. 103

Table 70.

REFDDR_PWRCTRL_CR ........................................................... 104

Table 71.

INT_PENDING_R1 ................................................................ 105

Table 72.

INT_PENDING_R2 ................................................................ 106

Table 73.

INT_PENDING_R3 ................................................................ 106

Table 74.

INT_PENDING_R4 ................................................................ 107

Table 75.

INT_CLEAR_Rx .................................................................. 107

Table 76.

INT_MASK_Rx ................................................................... 108

Table 77.

INT_SRC_Rx .................................................................... 108

Table 78.

INT_DBG_LATCH_Rx .............................................................. 108

Table 79.

NVM_SR ....................................................................... 109

Table 80.

NVM_CR ........................................................................110

Table 81.

NVM_MAIN_CTRL_SHR1 ............................................................111

Table 82.

NVM_MAIN_CTRL_SHR2 ............................................................112

Table 83.

NVM_RANK_SHR1 .................................................................113

Table 84.

NVM_RANK_SHR2 .................................................................113

Table 85.

NVM_RANK_SHR3 .................................................................114

Table 86.

NVM_RANK_SHR4 .................................................................114

Table 87.

NVM_RANK_SHR5 .................................................................115

Table 88.

NVM_ RANK_SHR6.................................................................116

Table 89.

NVM_RANK_SHR7 .................................................................116

Table 90.

NVM_RANK_SHR8 .................................................................116

Table 91.

NVM_BUCK_MODE_SHR1 ...........................................................117

Table 92.

NVM_BUCK_MODE_SHR2 ...........................................................118

Table 93.

NVM_BUCKx_VOUT_SHR ............................................................118

Table 94.

NVM_LDOx_SHR ..................................................................119

Table 95.

NVM_LDO3_SHR ..................................................................119

Table 96.

NVM_PD_SHR1 .................................................................. 120

Table 97.

NVM_PD_SHR2 .................................................................. 121

Table 98.

NVM_PD_SHR3 .................................................................. 122

Table 99.

NVM_BUCKS_IOUT_SHR1 .......................................................... 123

Table 100. NVM_BUCKS_IOUT_SHR2 .......................................................... 124

Table 101. NVM_LDOS_IOUT_SHR ............................................................ 125

Table 102. NVM_FS_OCP_SHR1 .............................................................. 126

Table 103. NVM_FS_OCP_SHR2 .............................................................. 127

Table 104. NVM_FS_SHR1 .................................................................. 128

Table 105. NVM_FS_SHR2 .................................................................. 129

Table 106. NVM_FS_SHR3 .................................................................. 130

Table 107. NVM_I2C_ADD_SHR............................................................... 131

Table 108. NVM_USER_SHRx ................................................................ 131

STPMIC25

List of tables

DS14278 - Rev 3

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