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PM3351-SW Datasheet(PDF) 7 Page - PMC-Sierra, Inc |
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PM3351-SW Datasheet(HTML) 7 Page - PMC-Sierra, Inc |
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7 / 268 page ![]() PM3351 ELAN 1X100 DATA SHEET PMC-970113 ISSUE 3 SINGLE PORT FAST ETHERNET SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 1 FEATURES • Single-chip, 1-port, full duplex or half duplex, 10/100BaseT switching device for low-cost unmanaged and managed networks. • On-chip 50 MHz RISC CPU processor core, multi-channel DMA controller, MAC-layer interface logic, FIFOs, PCI-based expansion port and a flexible memory controller. • CPU supports background applications running on local OS (e.g., SNMP or RMON), and real-time data oriented applications (e.g., frame forwarding and filtering decisions). • Performs frame switching at a rate of 200 Mbit/s (full duplex), 100 Mbit/s (half duplex). • Fully compatible with the PM3350, 8-port 10 Mbit/s switch device; may be used to create a compact and inexpensive mixed 10/100 Mbit/s switching hub. • Store-and-forward operation with full error checking and filtering. • Filtering and switching at wire rates (up to 148,800 packets per second), supporting a mix of Ethernet and IEEE 802.3 protocols. • Expansion port supports a peak system bandwidth of 1 Gbit/s, and is compatible with industry-standard PCI bus (version 2.1). • Performs all address learning, address table management and aging functions for up to 32,768 MAC addresses (limited by external memory). Address learning rate of up to 100,000 addresses per second. • Maximum broadcast/multicast at wire rates with configurable broadcast storm rate limiting. • Low-latency operation in both unicast and broadcast modes. • Implements the Link Partition function to isolate malfunctioning segments or hosts. • IEEE 802.1d compliant spanning-tree transparent bridging supported on-chip, with configurable aging time and frame lifetime control. |
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