PM3351-SW datasheet(77/268 Pages) PMC

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PM3351 ELAN 1X100

DATA SHEET

PMC-970113

ISSUE 3

SINGLE PORT FAST ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

The components of the operating environment are as follows:

The first 8192 bytes of space are reserved for holding switching firmware code.

This space is intended to serve as a backup for the internal 8192 byte

instruction RAM present in the ELAN 1x100.

The next 128 bytes are used to hold various frequently referenced, global

variables, such as the exception masks, broadcast counters, etc. These

variables normally reside in the Switch Processor data cache, and hence their

memory image may be inconsistent until the cache is flushed to memory.

A block of 64 bytes is reserved for use by the switching firmware as a register

save space during interrupts. This area is also cached.

A Local Port Descriptor is placed in the next 64 bytes. The Local Port

Descriptor also resides in the Switch Processor data cache, and this region of

memory will thus contain out-of-date values until the data cache is flushed. The

Local Port Descriptor contains statistics and control information used during

frame switching, and is described in further detail below.

A set of 16 Background Queues are placed in the next 256 bytes. These

queues are used to transfer frames and messages from the foreground

switching tasks to background and management tasks. The Background

Queues reside in the cached memory area.

The next 256 bytes are reserved for the Random Number Generation Table.

This table contains an array of seed values that are used to generate pseudo-

random numbers during the computation of backoff timer values for half-duplex

collision handling.

A set of eight Expansion Port Descriptors occupies another 256 bytes. These

data structures hold information pertaining to the devices accessible via the PCI

expansion bus. As in the case of the Local Port Descriptors, the Expansion Port

Descriptors are normally cached and the memory region will not be updated

until a data cache flush. The Expansion Port Descriptors are discussed in more

detail below.

A Dispatch Table, consisting of an array of pointers to firmware routines that

acta as handlers for special situations or for error recovery purposes. A block of

256 bytes is reserved for the Dispatch Table. Note that the Dispatch Table is

located immediately following the cached region of the Switch Processor

operating environment; this and all subsequent data structures are not cached.

The next 256 bytes are reserved for miscellaneous variables utilized on an

infrequent basis by the switching firmware. This includes things such as a

generic hash bucket structure and debug variables.

10. A Port Descriptor Error Counter structure is provided to hold error and collision

statistics for the local (MAC) port. The counter block requires 96 bytes of

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