PM3351-SW datasheet(86/268 Pages) PMC

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PM3351 ELAN 1X100

DATA SHEET

PMC-970113

ISSUE 3

SINGLE PORT FAST ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

then both of these fields are used to associate the source MAC address within the

Ethernet frame with a particular device and physical port. These fields are generally not

valid for message descriptors, in which case they contain message-specific information.

The HashBkt field holds the 24-bit local memory address of the address hash bucket

associated with either the source or destination MAC address in the Ethernet frame

header. If the Ethernet frame is to be broadcast (or the Learn bit is set, and the frame

must be flooded), the HashBkt field holds the memory address of the hash bucket

corresponding to the source MAC address in the source device's address space; if, on

the other hand, the frame is a unicast, then the HashBkt field contains the memory

address of the hash bucket for the destination MAC address in the destination device's

address space. The HashBkt field has a dual purpose: it is used to learn the memory

address of a source hash bucket during broadcasts and floods, and is also used to

indicate a target destination hash bucket to use in switching unicast frames once

address learning is complete. More details on the use of the HashBkt field in various

situations will be provided in subsequent sections. Note that the HashBkt field is not

used when the data descriptor does not point to an Ethernet frame (i.e., is a message

descriptor); in this case, it contains message-specific information.

Data descriptors are never cached by the Switch Processor, and hence the contents of

any data descriptor that is not actually being processed by the Switch Processor or ring

hardware may be read at any time via the PCI expansion port.

Transfer Rings

A set of fixed-size data structures, called

transfer rings, are used to control the transfer

of Ethernet frames and control/status messages to other devices interfaced to the

ELAN 1x100 via the PCI expansion bus. Each transfer ring is dedicated to a particular

external device, and points to frame or message data that must be sequentially

transferred to that device across the PCI bus. Transfer rings thus operate under a FIFO

queueing discipline. The general structure of the transfer rings is given below:

PM3351-SW Datasheet(PDF) 86 Page - PMC-Sierra, Inc