| Electronic Components Datasheet Search |
|
AM69 Datasheet(PDF) 153 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
AM69 Datasheet(HTML) 153 Page - Texas Instruments |
|
153 / 312 page ![]() Note The QSGMII interface electrical characteristics are compliant with QSGMII Specification revision 1.2. Note The UFS interface electrical characteristics are compliant with MIPI M-PHY Specification v3.1, February 17, 2014. Note The DP interface electrical characteristics are compliant with the VESA DisplayPort (DP) Standard v 1.4 February 23, 2016. Note The eDP interface electrical characteristics are compliant with the VESA Embedded DisplayPort (eDP) Standard v1.4b October 23, 2015. 6.6.13 DDR0 Electrical Characteristics Note The DDR interface is compatible with JESD209-4B standard compliant LPDDR4 SDRAM devices. 6.7 VPP Specifications for One-Time Programmable (OTP) eFuses This section specifies the operating conditions required for programming the OTP eFuses and is applicable only for High-Security Devices. 6.7.1 Recommended Operating Conditions for OTP eFuse Programming over operating free-air temperature range (unless otherwise noted) PARAMETER DESCRIPTION MIN NOM MAX UNIT VDD_CORE Supply voltage range for the core domain during OTP operation; OPP NOM (BOOT) See Recommended Operating Conditions V VDD_MCU Supply voltage range for the core domain during OTP operation; OPP NOM (BOOT) See Recommended Operating Conditions V VPP_CORE Supply voltage range for the eFuse ROM domain during normal operation N/A(2) Supply voltage range for the eFuse ROM domain during OTP programming(1) 1.71 1.8 1.89 V VPP_MCU Supply voltage range for the eFuse ROM domain during normal operation N/A(2) Supply voltage range for the eFuse ROM domain during OTP programming(1) 1.71 1.8 1.89 V (1) Supply voltage range includes DC errors and peak-to-peak noise. (2) N/A stands for Not Applicable. 6.7.2 Hardware Requirements The following hardware requirements must be met when programming keys in the OTP eFuses: • The VPP_CORE and VPP_MCU power supplies must be disabled when not programming OTP registers. • The VPP_CORE and VPP_MCU power supplies must be ramped up after the proper device power-up sequence (for more details, see Power Supply Sequencing). www.ti.com AM69A, AM69 SPRSP92C – FEBRUARY 2023 – REVISED JUNE 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 153 Product Folder Links: AM69A AM69 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |