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TMPR4956C Datasheet(PDF) 214 Page - Toshiba Semiconductor

Part # TMPR4956C
Description  64-Bit TX System RISC TX49 Family
PDF  286 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4956C Datasheet(HTML) 214 Page - Toshiba Semiconductor

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Chapter 11 TX4956 System Interface
11-46
EReq* (I)
Indicates an external agent is requesting bus ownership of the System interface. To gain mastership
of the bus, an external agent must arbitrate with the processor as follows:
A)
External agent asserts EReq*
B)
Wait for PMaster* to be deasserted (1 to N cycles).
C)
External agent drives SysAD and SysCmd buses. The external agent is guaranteed to
maintain mastership of the bus as long as EReq* is asserted.
If at any time EReq* is deasserted, the external agent must go back to step A and re-arbitrate for
the bus.
Figure 11.3.10 Sample Cycle with EReq* Asserted
From the time that EReq* is asserted, the external agent is guaranteed to gain mastership of the
bus after at most one processor request. However, if EOK* is being deasserted, the external agent
will gain mastership of the bus without having to accept any processor requests.
The external agent relinquishes bus mastership by deasserting EReq* as shown below:
Figure 11.3.11 Sample Cycle with Deassertion of EReq*
A)
External agent deasserts EReq*.
B)
Bus is set to a tristate.
C)
Processor regains mastership of bus.
ExtAgent Cmd
ExtAgent Data
C
B
A
SysAD
Cycle
MasterClock
SysCmd
EReq*
PMaster*
ExtAgent Cmd
ExtAgent Data
Proc Data
Data Cmd
C
B
A
SysAD
Cycle
MasterClock
SysCmd
EReq*
PMaster*



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