ACT88320 datasheet(19/57 Pages) QORVO

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Data Sheet Rev. E, November 2019 | Subject to change without notice

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ACT88320

Advanced PMU with Inrush Control and Bypass Switch

valid range. The IC transitions from any other state to

RESET if the input voltage drops below the VIN_UV

threshold voltage. It is important to note any transition

to RESET returns all volatile and non-volatile registers

to their default states.

POWER SEQUENCE START State

The POWER SEQUENCE START state is a transitional

state while the regulators are starting. The IC does not

operate in this state.

ACTIVE State

The ACTIVE state is the normal operating state when

the input voltage is within the allowable range, all

outputs are turned on, and no faults are present.

SLEEP State

The SLEEP state is a low power mode for the operating

system. Each output can be programmed to be on or

off in the SLEEP state. The outputs follow their

programmed sequencing delay times when turning on

or off as they enter or exit the SLEEP state. Buck1/2/3

can be programmed to regulate to their VSET0 voltage,

VSET1 voltage, or be turned off in the SLEEP state.

LDO1/2 can be programmed to regulate to their VSET0

voltage or can be programmed to be turned off. Note

that LDO1/2 do not have a VSET1 voltage.

The IC can enter SLEEP state via I2C registers SLEEP

and SLEEP EN. Table 1 shows the conditions to enter

SLEEP state. ACT88320 I2C stays enabled in SLEEP

state. The IC exits the SLEEP state when the conditions

to enter SLEEP state are no longer present.

Table 1. SLEEP Mode Truth Table

DPSLP State

The DPSLP state is another low power operating mode

for the operating system. It is intended to be used in a

lower power configuration than the SLEEP mode. It is

similar to the SLEEP state, but DPSLP uses slightly

different configurations to enter and exit this mode.

Each output can be programmed to be on or off in the

DPSLP state. This programming can different from the

SLEEP state. The outputs follow their programmed

sequencing delay times when turning on or off as they

enter or exit the DPSLP state.

The IC can enter DPSLP state via I2C registers DPSLP

and DPSLP EN and/or a GPIO input pin. Table 2 shows

the conditions to enter DPSLP state. ACT88320 I2C

stays enabled in DPSLP state. The IC exits the DPSLP

state when the conditions to enter DPSLP state are no

longer present.

If OV, UV, or THERMAL faults occur when in DPSLP

state, the IC resets to the POWER ON/Active state.

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