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LM5145 Datasheet(PDF) 27 Page - Texas Instruments

Part # LM5145
Description  LM25137 4V to 42V, 100% Duty Cycle Capable, Dual-Channel, Synchronous Buck DC/DC Controller
PDF  73 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LM5145 Datasheet(HTML) 27 Page - Texas Instruments

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22ns
0.046
(9)
For wide VIN applications and low output voltages, an alternative is to reduce the LM25137 switching frequency
to meet the requirement of Equation 8.
7.3.13 100% Duty Cycle Capability
An integrated 20µA charge pump is always active in the LM25137. As VIN approaches the VOUT setpoint, the
duty cycle extends towards 100%. When the control loop attempts to set an off-time less than tOFF(min), the
LM25137 skips the off-time interval for that particular switching cycle and enters 100% duty cycle mode. Under
these conditions, CBOOT cannot charge by the usual path from VCC through the bootstrap diode, since the
low-side MOSFET is not turned on. Instead, the 20µA charge pump charges CBOOT and keeps the high-side
MOSFET on, thus achieving true 100% duty cycle – at least until the control loop again demands an off-time
greater than tOFF(min). This action allows for the lowest possible dropout voltage from input to output. Note that
adding a gate-to-source resistor at the high-side MOSFET can discharge CBOOT and thus affect 100% duty-cycle
operation.
7.3.14 MOSFET Gate Drivers (HO1, HO2, LO1, LO2)
The LM25137 contains MOSFET gate drivers and associated high-side level shifters to drive the external
N-channel power MOSFETs. The high-side gate driver works in conjunction with the integrated bootstrap diode
and external bootstrap capacitor CBOOT. During the conduction interval of the low-side MOSFET, the SW voltage
is approximately 0V and CBOOT charges from VCC through the diode.
The LM25137 controls the HO and LO outputs with an adaptive dead-time methodology such that both outputs
(HO and LO) are never enabled at the same time, preventing cross conduction. When the controller commands
LO to be enabled, the adaptive dead-time logic first disables HO and waits for the HO-to-GND voltage to
drop below 2V (typical). LO is then enabled after a small delay (HO falling to LO rising delay). Similarly, the
HO turn-on is delayed until the LO voltage has dropped below 2V. HO is then enabled after a small delay
(LO falling to HO rising delay). This technique provides adequate dead-time for any size N-channel MOSFET
component or parallel MOSFET configurations. Caution is advised when adding series gate resistors, as series
gate resistors can decrease the effective dead-time. The selected high-side power MOSFET determines the
appropriate bootstrap capacitance value CBOOT in accordance with Equation 10.
(10)
where
• QG is the total gate charge of the high-side MOSFET at the applicable gate drive voltage, normally 5V
• ΔVCBOOT is the voltage variation of the high-side MOSFET driver after turn-on
To determine CBOOT, choose ΔVCBOOT so that the available gate drive voltage is not significantly impacted.
An acceptable range of ΔVCBOOT is 100mV to 200mV. The bootstrap capacitor must be a low-ESR ceramic
capacitor, typically 0.1µF. Given the nominal VCC voltage of 5V, using logic-level power MOSFETs with RDS(on)
rated at VGS = 4.5V is imperative.
7.3.15 Output Configurations (CNFG)
Using a resistor designated as RCNFG connected from CNFG to AGND, configure the LM25137 as a primary
controller (independent dual outputs or interleaved single output) or as a secondary controller for paralleled
phases in high-current applications.
www.ti.com
LM25137
SNVSCU4 – OCTOBER 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: LM25137



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