LM5145 datasheet(34/73 Pages) TI2

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load current,

iOUT(t)

IOUT1

IOUT2

'IOUT

tramp

IOUT2

IOUT1

'IOUT

inductor current, iL(t)

load current, iOUT(t)

'QC

OUT

ramp

OUT

Figure 8-1. Load Transient Response Representation Showing COUT Charge Surplus or Deficit

In a typical regulator application of 12V input to low output voltage (for example, 3.3V), the load-off transient

represents the worst case in terms of output voltage transient deviation. With that voltage conversion ratio, the

steady-state duty cycle is approximately 28% and the large-signal inductor current slew rate when the duty cycle

collapses to zero is approximately –VOUT/L. Compared to a load-on transient, the inductor current takes much

longer to transition to the required level. The surplus of charge in the output capacitor causes the output voltage

to significantly overshoot. In fact, to deplete this excess charge from the output capacitor as quickly as possible,

the inductor current must ramp below the nominal level following the load step. In this scenario, a large output

capacitance can be advantageously employed to absorb the excess charge and minimize the voltage overshoot.

Equation 13 calculates the output capacitance to meet the dynamic specification of output voltage overshoot

during such a load-off transient (denoted as ΔVOVERSHOOT with step reduction in output current given by ΔIOUT).

OUT

OVERSHOOT

OUT

˜ '

(14)

The capacitor manufacturer data sheet provides the ESR and ESL, either explicitly as specifications or implicitly

in the impedance versus frequency curve. Depending on the type, size, and construction, electrolytic capacitors

have significant ESR, 10mΩ and above, and relatively high ESL, 10nH to 20nH. PCB traces contribute some

parasitic resistance and inductance as well. Ceramic output capacitors, have low ESR and ESL contributions

at the switching frequency, and the capacitive impedance dominates. However, depending on the package and

voltage rating of the ceramic capacitor, the effective capacitance can drop quite significantly with applied DC

voltage and operating temperature.

Ignoring the ESR term in Equation 13 gives a quick estimation of the minimum ceramic capacitance necessary

to meet the output ripple specification. Four 47µF, 10V, X7R capacitors in 1210 footprint are a common choice

for a 5V output. Use Equation 14 to determine if additional capacitance is necessary to meet the load-off

transient overshoot specification.

A composite implementation of ceramic and electrolytic capacitors highlights the rationale for paralleling

capacitors of dissimilar chemistries yet complementary performance. The frequency response of each capacitor

is accretive in that each capacitor provides desirable performance over a certain part of the applicable frequency

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LM5145 Datasheet(PDF) 34 Page - Texas Instruments

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