LM5145 datasheet(6/73 Pages) TI2

6 / 73 page

Table 5-1. Pin Functions

TYPE(1)

DESCRIPTION

NAME

NO.

FB2

Connect FB2 through a 7.5kΩ, 24.9kΩ or 48.7kΩ resistor to VDDA to set the output voltage at 3.3V, 5V

or 12V, respectively. Alternatively, use a resistive divider from VOUT2 to FB2 to set the output voltage

setpoint of channel 2 between 0.8V and 60V. The FB2 regulation voltage is 0.8V.

VOUT2

Output voltage sense and the current sense amplifier input of channel 2. Connect VOUT2 to the output

side of the channel 2 current sense resistor (or to the relative sense capacitor terminal if inductor DCR

current sensing is used).

ISNS2+

Channel 2 current sense amplifier input. Connect ISNS2+ to the inductor side of the external current

sense resistor (or to the relevant sense capacitor terminal if inductor DCR current sensing is used)

using a low-current Kelvin connection.

PG2

An open-drain output that goes low if VOUT2 is outside a specific regulation window

EN2

An active high input (VEN2 > 1V typical) enables channel 2. If VEN2 < 0.5V, channel 2 is disabled and is

in shutdown mode unless a SYNC signal is present at PFM/SYNC. EN2 must never be left floating.

VIN

Supply voltage input source for the VCC regulator

HO2

Channel 2 high-side gate driver output

SW2

Switching node of the channel 2 buck regulator. Connect to the bootstrap capacitor, the source terminal

of the high-side MOSFET, and the drain terminal of the low-side MOSFET.

CBOOT2

Channel 2 high-side driver supply for bootstrap gate drive

LO2

Channel 2 low-side gate driver output

PGND

Power ground connection pin for the low-side MOSFET gate driver

VCC

VCC bias supply pin. Connect a ceramic capacitor between VCC and PGND.

LO1

Channel 1 low-side gate driver output

CBOOT1

Channel 1 high-side driver supply for bootstrap gate drive

SW1

Switching node of the channel 1 buck regulator. Connect to the bootstrap capacitor, the source terminal

of the high-side MOSFET, and the drain terminal of the low-side MOSFET.

HO1

Channel 1 high-side gate driver output

EN1

An active high input (VEN1 > 1V typical) enables channel 1. If VEN1 < 0.5V, channel 1 is disabled and is

in shutdown mode unless a SYNC signal is present at PFC/SYNC. EN1 must never be left floating.

PG1

An open-collector output that goes low if VOUT1 is outside a specified regulation window.

ISNS1+

Channel 1 current sense amplifier input. Connect ISNS1+ to the inductor side of the external current

sense resistor (or to the relevant sense capacitor terminal if inductor DCR current sensing is used)

using a low-current Kelvin connection.

BIAS1/

VOUT1

If VBIAS1 > 4.3V, BIAS1 becomes the supply voltage to the internal VCC regulator. BIAS1 also acts as

the primary VOUT1 sensing and the current sense amplifier input for channel 1. Connect BIAS/VOUT1

to the output side of the channel 1 current sense resistor.

CNFG

Connect a resistor from CNFG to GND to set the output configuration and to activate DRSS at one of

two modulation frequencies (or to disable). See also Table 7-1.

FB1

Connect FB1 through a 7.5kΩ, 24.9kΩ or 48.7kΩ resistor to VDDA to set the output voltage at 3.3V, 5V

or 12V, respectively. Alternatively, use a resistive divider from VOUT1 to FB1 to set the output voltage

setpoint of channel 1 between 0.8V and 60V. The FB1 regulation voltage is 0.8V.

COMP1

Output of the channel 1 transconductance error amplifier. COMP1 is high impedance in interleaved or

secondary mode. Pulling COMP1 below 100mV in interleaved mode disables the HO1 and LO1 gate

driver outputs.

RSS

Connect a resistor from RSS to GND to set the soft-start time between 1.5ms and 20ms

Frequency programming pin. A resistor from RT to AGND sets the oscillator frequency between 100kHz

and 2.2MHz.

AGND

Analog ground connection. Ground return for the internal voltage reference and analog circuits.

VDDA

Internal analog bias regulator output. Connect a 1µF ceramic decoupling capacitor from VDDA to

AGND.

SYNCOUT

SYNCOUT is a logic-level signal with a rising edge approximately 90° lagging HO1 (or 90° leading

HO2). When SYNCOUT is used to synchronize a second LM25137 controller, the phases operate at 0°,

90°, 180° and 270° as needed.

LM25137

SNVSCU4 – OCTOBER 2025

www.ti.com

Submit Document Feedback

Product Folder Links: LM25137

LM5145 Datasheet(PDF) 6 Page - Texas Instruments

LM5145 Datasheet(HTML) 6 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

Datasheet Download

Link URL