www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MIN

ALL AROUND

8X (1)

12X (0.6)

12X (0.95)

7X ( 1.5)

(R

) TYP

0.05

2X (1.3)

2X (5)

(6.65)

(6.65)

2X (3.65)

(6.4)

(4.8)

2X (3.65)

12X (3.925)

(0.605)

TYP

(1.21)

TYP

(0.765) TYP

(1.53) TYP

8X (2.15)

4X (2.95)

(

) VIA

TYP

0.2

QFM - 2.3 mm max height

MOJ0020A

QUAD FLAT MODULE

4222962/A 05/2016

NOTES: (continued)

3. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments

literature number SLUA271 (www.ti.com/lit/slua271).

4. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view.

LAND PATTERN EXAMPLE

SCALE:6X

1

8

5

11

10

19

17

16

20

2

PKG

SYMM

PKG

KEEP-OUT AREA

(2.8 X 4)

KEEP-OUT AREA

(2.9 X 3.25)

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

SOLDER MASK

DEFINED