AD5710R datasheet(22/56 Pages) AD

22 / 56 page

Data Sheet

AD5710R

THEORY OF OPERATION

analog.com

Rev. 0 | 22 of 56

Table 8. AD5710R Operating Modes

Output State

MODE_CH_n[1:0]

Normal operation

2'b00

Power-down state

►

High-Z state in IDAC

mode

►

15kΩ to GND in VDAC

mode

Others

Entering into the power-down state of any DAC channel does not

affect other register settings or the read and write capability of those

registers of the respective DAC channel. The input or DAC registers

can still be updated but do not reflect on the DAC output pins,

except during switching between DAC output modes.

Recommended Switching Flow: IDAC Mode

and VDAC Mode

Figure 54 shows the recommended switching procedures between

VDAC and IDAC modes, including their enabling and disabling

operations.

Figure 54. Recommended Switching Between Operating Modes and VDAC/

IDAC Modes

VOLTAGE REFERENCE

The device has an on-chip, buffered, 2.5V, 3ppm/°C reference

available at the VREF pin that is capable of sourcing external loads

up to +5mA.

By default, upon power-up or after a power-on reset, the VREF pin

is configured as an input pin, and an external reference voltage

must be provided. The internal reference can be enabled by setting

Bit 0 (SEL) in the REFERENCE_CONTROL_0 register to 1. It is

recommended to place the external reference IC on the same

supply as the AD5710R such that VREF is always less than or

equal to AVDD during power-up.

When operating with the internal reference, the device meets speci-

fied performance without the need for an external capacitor on the

VREF pin.

INTEGRATED MULTIPLEXER

The device contains a 27:1 analog multiplexer that can output a

voltage on the MUX_OUT pin that is a representative of either the

output voltage or the output current of a chosen channel, or the

internal die temperature of the device. A voltage output represents

the full scale range of the monitor channel that can be selected by

configuring the SEL bits on the MUX_OUT_SELECT register. An

invalid write to the SEL bits is ignored, and the SEL value does not

change.

The following signals can be routed to the MUX_OUT output:

►

OUTx_VMON output voltages

►

OUTx_IMON output through a sense resistor

►

Supply rail voltages

►

Internal die temperature

By default, the MUX_OUT is powered down. The available channel

selections and their corresponding register field values are listed in

Table 9.

Table 9. Multiplexer Channels Options

SEL Field

MUX_OUT

Power down (default)

Voltage monitor, CH0

Current monitor through RSENSE, CH0

PVDD0 for CH0

Voltage monitor, CH1

Current monitor through RSENSE, CH1

PVDD0 for CH1

Voltage monitor, CH2

Current monitor through RSENSE, CH2

PVDD0 for CH2

Voltage monitor, CH3

Current monitor through RSENSE, CH3

PVDD0 for CH3

Voltage monitor, CH4

Current monitor through RSENSE, CH4

PVDD1 for CH4

Voltage monitor, CH5

Current monitor through RSENSE, CH5

PVDD1 for CH5

Voltage monitor, CH6

Current monitor through RSENSE, CH6

PVDD1 for CH6

Voltage monitor, CH7

Current monitor through RSENSE, CH7

PVDD1 for CH7

Die Temperature

AD5710R Datasheet(PDF) 22 Page - Analog Devices

AD5710R Datasheet(HTML) 22 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL