6V7 datasheet(63/298 Pages) RENESAS

63 / 298 page

Rev.1.00

May 18, 2004

page 63 of 296

M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP

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2.7.17 INT Interrupt

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INT0 and INT1 are triggered by the edges of external inputs. The edge polarity is selected using the

polarity select bit.

As for external interrupt input, an interrupt can be generated both at the rising edge and at the falling edge

by setting “1” in the INTi interrupt polarity switching bit of the interrupt request cause select register

(035F16). To select both edges, set the polarity switching bit of the corresponding interrupt control regis-

ter to ‘falling edge’ (“0”).

Figure 2.7.10 shows the Interrupt control reserved register, Figure 2.7.11 shows the Interrupt request

cause select register.

Figure 2.7.10 Interrupt control reserved register i (i = 0 to 3)

Interrupt control reserved register i

Bit nameFunction

Bit symbol

Symbol

Address

When reset

REiIC (i = 1 to 3)

004616, 004716, 005F16

Indeterminate

b7b6b5b4b3b2b1b0

Must always be set to “0”

Reserved bits

000

Figure 2.7.11 Interrupt request cause select register

Interrupt request cause select register

Bit name

Function

Bit symbol

Symbol

Address

When reset

IFSR

035F16

0016

IFSR0

b7b6b5b4b3b2b1b0

INT0 interrupt polarity

switching bit

0 : One edge

1 : Two edges

0 : One edge

1 : Two edges

Must always be set to “0”

INT1 interrupt polarity

switching bit

Reserved bits

IFSR1

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