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6V7 Datasheet(PDF) 25 Page - Renesas Technology Corp |
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6V7 Datasheet(HTML) 25 Page - Renesas Technology Corp |
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25 / 298 page  Rev.1.00 May 18, 2004 page 25 of 296 M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP Figure 2.4.2 Processor mode register 1 Processor mode register 1 (Note 1) Symbol Address When reset PM1 000516 00000X002 Bit name Function Bit symbol W R b7 b6 b5 b4 b3 b2 b1 b0 Nothing is assigned. In an attempt to write to this bit, write “0.” The value, if read, turns out to be indeterminate. Reserved bit 0 Notes 1: Set bit 1 of the protect register (address 000A16) to “1” when writing new values to this register. 2: As this bit becomes “0” at reset, must always be set to “1” after reset release. Reserved bits Must always be set to “0” 0 0 0 0 Reserved bit (Note 2) Must always be set to “0” 0 Reserved bit Must always be set to “0” Must always be set to “0” 0 |
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