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6V7 Datasheet(PDF) 24 Page - Renesas Technology Corp |
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6V7 Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 298 page ![]() Rev.1.00 May 18, 2004 page 24 of 296 M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP Figure 2.4.1 Processor mode register 0 Processor mode register 0 (Note 1) Symbol Address When reset PM0 000416 0016 (Note 2) Bit name Function Bit symbol W R b7b6b5b4b3b2b1b0 0 0: Single-chip mode 0 1: Memory expansion mode 1 0: Inhibited 1 1: Microprocessor mode b1 b0 PM03 PM01 PM00 Processor mode bit PM02 R/W mode select bit 0 : RD,BHE,WR 1 : RD,WRH,WRL Software reset bit The device is reset when this bit is set to “1”. The value of this bit is “0” when read. PM04 PM05 PM06 PM07 Port P40 to P43 function select bit (Note 3) 0 : Address output 1 : Port function (Address is not output) BCLK output disable bit 0 : BCLK is output 1 : BCLK is not output (Pin is left floating) Notes 1: Set bit 1 of the protect register (address 000A16) to “1” when writing new values to this register. 2: If the VCC voltage is applied to the CNVSS, the value of this register when reset is 0316. (PM00 and PM01 both are set to “1”.) 3: Valid in microprocessor and memory expansion modes. Reserved bit Must always be set to “0” 0 0 |
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