6V7 datasheet(155/298 Pages) RENESAS

155 / 298 page

Rev.1.00

May 18, 2004

page 155 of 296

M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP

Figure 2.12.10 A-D control register 0 in single sweep mode

A-D control register 0 (Note 1)

Symbol

Address

When reset

ADCON0

03D616

00000???2

Analog input pin

select bit

CH0

Bit symbol

Bit name

Function

CH1

CH2

A-D operation mode

select bit 0

1 0 : Single sweep mode

MD0

MD1

ADST

A-D conversion start flag

0 : A-D conversion disabled

1 : A-D conversion started

Frequency select bit 0

0 : fAD/4 is selected

1 : fAD/2 is selected

CKS0

1 0

Invalid in single sweep mode

b4 b3

Reserved bit

Must always be set to “0”

Notes 1: If the A-D control register is rewritten during A-D conversion, the conversion result is

indeterminate.

2: When changing A-D operation mode, set analog input pin again.

3: When selecting fAD/1, always be sure to set this bit to “1”. Also , if f(Xin) exceeds 10 MHz,

lower the

φA-D frequency to 10 MHz or below by dividing it.

(Note 2)

Figure 2.12.11 A-D control register 1 in single sweep mode

A-D control register 1 (Note 1)

Symbol

Address

When reset

ADCON1

03D716

0016

Bit name

Function

Bit symbol

A-D sweep pin select bit

SCAN0

SCAN1

MD2

Reserved bit

Must always be set to “0”

VCUT

Reserved bits

Vref connect bit

0 : Any mode other than repeat sweep mode 1

A-D operation mode

select bit 1

1 : Vref connected

When single sweep and repeat sweep mode 0

are selected

0 0 : Do not set

0 1 : AN 0 and AN1 (2 pins)

1 0 : AN 0 to AN3 (4 pins)

1 1 : AN 0 to AN5 (6 pins)

b1 b0

Must always be set to “0”

Frequency select bit 1

0 : fAD/2 or fAD/4 is selected

1 : fAD is selected

CKS1

Notes 1: If the A-D control register is rewritten during A-D conversion, the conversion result is

indeterminate.

2: When selecting fAD/1, always be sure to set the A-D control register 0 bit 7 (CKS0) to “1”.

Also , if f(Xin) exceeds 10 MHz, lower the

φA-D frequency to 10 MHz or below by dividing it.

(Note 2)

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