HD64F36034 datasheet(381/592 Pages) RENESAS

381 / 592 page

Section 16 Synchronous Serial Communication Unit (SSU)

Rev. 4.00 Mar. 15, 2006 Page 349 of 556

REJ09B0026-0400

Section 16 Synchronous Serial Communication Unit (SSU)

The synchronous serial communication unit (SSU) can handle clocked synchronous serial data

communication.

Figure 16.1 shows a block diagram of the SSU.

16.1

Features

• Can be operated in clocked synchronous communication mode or four-line bus communication

mode (including bidirectional communication mode)

• Can be operated as a master or a slave device

• Choice of seven internal clocks (φ/256, φ/128, φ/64, φ/32, φ/16, φ/8, φ/4) and an external clock

as a clock source

• Clock polarity and phase of SSCK can be selected

• Choice of data transfer direction (MSB-first or LSB-first)

• Receive error detection: overrun error

• Multimaster error detection: conflict error

• Five interrupt sources: transmit-end, transmit-data-empty, receive-data-full, overrun error, and

conflict error

16.2

Continuous transmission and reception of serial data are enabled

since both transmitter and Input/Output Pins

Table 16.1 shows the pin configuration of the SSU.

Table 16.1

Pin Configuration

Pin Name

Abbreviation

I/O

Function

SSU clock

SSCK

I/O

SSU clock input/output

SSU data input/output

SSI

I/O

SSU data input/output

SSO

I/O

SSU data input/output

SSU chip select input/output

SCS

I/O

SSU chip select input/output

HD64F36034 Datasheet(PDF) 381 Page - Renesas Technology Corp

HD64F36034 Datasheet(HTML) 381 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL