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HD64F36034 Datasheet(PDF) 185 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 185 Page - Renesas Technology Corp |
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185 / 592 page ![]() Section 11 Timer V Rev. 4.00 Mar. 15, 2006 Page 153 of 556 REJ09B0026-0400 Bit Bit Name Initial Value R/W Description 2 1 0 CKS2 CKS1 CKS0 0 0 0 R/W R/W R/W Clock Select 2 to 0 These bits select clock signals to input to TCNTV and the counting condition in combination with ICKS0 in TCRV1. Refer to table 11.2. Table 11.2 Clock Signals to Input to TCNTV and Counting Conditions TCRV0 TCRV1 Bit 2 Bit 1 Bit 0 Bit 0 CKS2 CKS1 CKS0 ICKS0 Description 0 0 0 Clock input prohibited 1 0 Internal clock: counts on φ/4, falling edge 1 Internal clock: counts on φ/8, falling edge 1 0 0 Internal clock: counts on φ/16, falling edge 1 Internal clock: counts on φ/32, falling edge 1 0 Internal clock: counts on φ/64, falling edge 1 Internal clock: counts on φ/128, falling edge 1 0 0 Clock input prohibited 1 External clock: counts on rising edge 1 0 External clock: counts on falling edge 1 External clock: counts on rising and falling edge |
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