HD64F36034 datasheet(187/592 Pages) RENESAS

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Section 11 Timer V

Rev. 4.00 Mar. 15, 2006 Page 155 of 556

REJ09B0026-0400

Bit

Bit Name

Initial

Value

R/W

Description

OS1

OS0

R/W

Output Select 1 and 0

These bits select an output method for the TMOV pin by

the compare match of TCORA and TCNTV.

00: No change

01: 0 output

10: 1 output

11: Output toggles

OS3 and OS2 select the output level for compare match B. OS1 and OS0 select the output level

for compare match A. The two output levels can be controlled independently. After a reset, the

timer output is 0 until the first compare match.

11.3.5

Timer Control Register V1 (TCRV1)

TCRV1 selects the edge at the TRGV pin, enables TRGV input, and selects the clock input to

TCNTV.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 5



All 1



Reserved

These bits are always read as 1.

TVEG1

TVEG0

R/W

TRGV Input Edge Select

These bits select the TRGV input edge.

00: TRGV trigger input is prohibited

01: Rising edge is selected

10: Falling edge is selected

11: Rising and falling edges are both selected

TRGE

R/W

TCNT starts counting up by the input of the edge which is

selected by TVEG1 and TVEG0.

0: Disables starting counting-up TCNTV by the input of

the TRGV pin and halting counting-up TCNTV when

TCNTV is cleared by a compare match.

1: Enables starting counting-up TCNTV by the input of

the TRGV pin and halting counting-up TCNTV when

TCNTV is cleared by a compare match.

HD64F36034 Datasheet(PDF) 187 Page - Renesas Technology Corp

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