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HD64F36034 Datasheet(PDF) 284 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 284 Page - Renesas Technology Corp |
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284 / 592 page ![]() Section 14 Serial Communication Interface 3 (SCI3) Rev. 4.00 Mar. 15, 2006 Page 252 of 556 REJ09B0026-0400 • Break detection: Break can be detected by reading the RXD pin level directly in the case of a framing error Clocked synchronous mode • Data length: 8 bits • Receive error detection: Overrun errors Table 14.1 Channel Configuration Channel Abbreviation Pin Register Register Address SMR H'FFA8 BRR H'FFA9 SCR3 H'FFAA TDR H'FFAB SSR H'FFAC RDR H'FFAD RSR Channel 1* 1 SCI3 SCK3 RXD TXD TSR SMR_2 H'F740 BRR_2 H'F741 SCR3_2 H'F742 TDR_2 H'F743 SSR_2 H'F744 RDR_2 H'F745 RSR_2 Channel 2* 2 SCI3_2 SCK3_2 RXD_2 TXD_2 TSR_2 Notes: 1. Channel 1 is used in on-board programming mode by boot mode. 2. The H8/36037 Group does not have the channel 2. |
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