HD64F36034 datasheet(288/592 Pages) RENESAS

288 / 592 page

Section 14 Serial Communication Interface 3 (SCI3)

Rev. 4.00 Mar. 15, 2006 Page 256 of 556

REJ09B0026-0400

14.3.5

Serial Mode Register (SMR)

SMR is used to set the SCI3’s serial transfer format and select the baud rate generator clock

source.

Bit

Bit Name

Initial

Value

R/W

Description

COM

R/W

Communication Mode

0: Asynchronous mode

1: Clocked synchronous mode

CHR

R/W

Character Length (enabled only in asynchronous mode)

0: Selects 8 bits as the data length.

1: Selects 7 bits as the data length.

R/W

Parity Enable (enabled only in asynchronous mode)

When this bit is set to 1, the parity bit is added to transmit

data before transmission, and the parity bit is checked in

reception.

R/W

Parity Mode (enabled only when the PE bit is 1 in

asynchronous mode)

0: Selects even parity.

1: Selects odd parity.

STOP

R/W

Stop Bit Length (enabled only in asynchronous mode)

Selects the stop bit length in transmission.

0: 1 stop bit

1: 2 stop bits

For reception, only the first stop bit is checked, regardless

of the value in the bit. If the second stop bit is 0, it is

treated as the start bit of the next transmit character.

R/W

Multiprocessor Mode

When this bit is set to 1, the multiprocessor

communication function is enabled. The PE bit and PM

bit settings are invalid in multiprocessor mode. In clocked

synchronous mode, clear this bit to 0.

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