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SH7124 Datasheet(PDF) 142 Page - Renesas Technology Corp

Part # SH7124
Description  Renesas 32-Bit RISC Microcomputer SuperH??RISC engine Family
PDF  774 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7124 Datasheet(HTML) 142 Page - Renesas Technology Corp

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Section 7 User Break Controller (UBC)
Rev. 4.00 Jul. 25, 2008 Page 122 of 750
REJ09B0243-0400
7.2.7
Break Address Mask Register B (BAMRB)
BAMRB is a 32-bit readable/writable register. BAMRB specifies bits masked in the break address
specified by BARB.
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987654321
0
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000000000000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BAMB31 BAMB30 BAMB29 BAMB28 BAMB27 BAMB26 BAMB25 BAMB24 BAMB23 BAMB22 BAMB21 BAMB20 BAMB19 BAMB18 BAMB17 BAMB16
BAMB15 BAMB14 BAMB13 BAMB12 BAMB11 BAMB10
BAMB9
BAMB8
BAMB7
BAMB6
BAMB5
BAMB4
BAMB3
BAMB2
BAMB1
BAMB0
Bit
Bit Name
Initial
Value
R/W
Description
31 to 0
BAMB31 to
BAMB 0
All 0
R/W
Break Address Mask B
Specifies bits masked in the break address of channel B
specified by BARB (BAB31 to BAB0).
0: Break address BABn of channel B is included in the
break condition
1: Break address BABn of channel B is masked and is
not included in the break condition
Note: n = 31 to 0



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