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HD6433635SW Datasheet(PDF) 250 Page - Renesas Technology Corp |
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HD6433635SW Datasheet(HTML) 250 Page - Renesas Technology Corp |
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250 / 418 page  236 Bit Rate Register (BRR) Bit 76543210 BRR7 BRR6 BRR5 BRR4 BRR3 BRR2 BRR1 BRR0 Initial value 11111111 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W The bit rate register (BRR) is an 8-bit register which, together with the baud rate generator clock selected by bits CKS1 and CKS0 in the serial mode register (SMR), sets the transmit/receive bit rate. BRR can be read or written by the CPU at any time. BRR is initialized to H'FF upon reset or in standby mode, watch mode, subactive mode, or subsleep mode. Table 10.6 gives examples of how BRR is set in asynchronous mode. The values in table 10.6 are for active (high-speed) mode. |
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