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32186 Datasheet(PDF) 425 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 425 Page - Renesas Technology Corp |
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425 / 1032 page ![]() MULTIJUNCTION TIMERS 10 10-129 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 Figure 10.6.1 Block Diagram of TML (Input-Related 32-Bit Timer) 3 2 1 0 3 2 1 0 S S S S TIN20S TIN21S TIN20 (P134) TIN21 (P135) TIN22S TIN22 (P136) TIN23S TIN23 (P137) IRQ11 IRQ11 IRQ11 IRQ11 0 1 2 3 S 3 2 1 0 3 2 1 0 0 1 2 3 clk TML0 cap3 cap2 cap1 cap0 S S S S S TIN30S TIN31S TIN30 (P34) TIN31 (P35) TIN32S TIN32 (P36) TIN33S TIN33 (P37) IRQ18 IRQ18 IRQ18 IRQ18 clk TML1 cap3 cap2 cap1 cap0 S DMA5 DMA common AD0TRG Clock bus Input event bus Output event bus : Selector Measure register 3 Counter (32-bit) Measure register 2 Measure register 1 Measure register 0 Measure register 3 Measure register 2 Measure register 1 Measure register 0 Counter (32-bit) BCLK 1/4 1/2 10.6 TML (Input-Related 32-Bit Timer) 10.6.1 Outline of TML TML (Timer Measure Large) is an input-related 32-bit timer capable of measuring input pulses in two circuit blocks comprising a total of eight channels. The table and diagram below show specifications and a block diagram of TML, respectively. Table 10.6.1 Specifications of TML (Input-Related 32-Bit Timer) Item Specification Number of channels 8 channels (2 circuit blocks consisting of 4 channels each, 8 channels in total) Input clock BCLK/4 (5.0 MHz when f(BCLK) = 20 MHz), BCLK/2 (10.0 MHz when f(BCLK) = 20 MHz) or clock bus 1 input Counter 32-bit up-counter × 2 Measure register 32-bit measure register × 8 Timer startup Start counting after exiting the reset state 10.6 TML (Input-Related 32-Bit Timer) |
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