32186 datasheet(428/1032 Pages) RENESAS

428 / 1032 page

MULTIJUNCTION TIMERS

10-132

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

10.6.5 TML Counters

TML0 Counter (TML0CT)

<Address: H’0080 03E0>

TML1 Counter (TML1CT)

<Address: H’0080 0FE0>

Bit Name

Function

0–31

TML0CT

32-bit counter value

Note: • These registers must always be accessed wordwise (in 32 bits) beginning with the word boundary(The lower address B’00).

The TML counters are a 32-bit up-counter, which starts counting upon deassertion of the reset input signal.

The counters can be read during operation.

10.6.6 TML Measure Registers

TML0 Measure 3 Register (TML0MR3)

<Address: H’0080 03F0>

TML0 Measure 2 Register (TML0MR2)

<Address: H’0080 03F4>

TML0 Measure 1 Register (TML0MR1)

<Address: H’0080 03F8>

TML0 Measure 0 Register (TML0MR0)

<Address: H’0080 03FC>

TML1 Measure 3 Register (TML1MR3)

<Address: H’0080 0FF0>

TML1 Measure 2 Register (TML1MR2)

<Address: H’0080 0FF4>

TML1 Measure 1 Register (TML1MR1)

<Address: H’0080 0FF8>

TML1 Measure 0 Register (TML1MR0)

<Address: H’0080 0FFC>

Bit Name

Function

0–31

TML0MR3–TML0MR0, TML1MR3–TML1MR0

32-bit measure register value

–

Notes: • These registers are a read-only register.

• These registers must always be accessed wordwise (in 32 bits) beginning with the word boundary(The lower address B’00).

The TML measure registers are a 32-bit register, which is used to latch the counter content upon event input.

The TML measure registers can only be read, and cannot be written to.

b16

b31

(16 low-order bits)

b15

TML0CT, TML1CT (16 high-order bits)

???

????

b15

TML0MR3-TML0MR0,TML1MR3-TML1MR0 (16 high-order bits)

???

????

b16

b31

(16 low-order bits)

10.6 TML (Input-Related 32-Bit Timer)

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