32186 datasheet(317/1032 Pages) RENESAS

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MULTIJUNCTION TIMERS

10-21

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

TCLK Input Processing Control Register (TCLKCR)

<Address: H’0080 0210>

Bit Name

Function

0, 1

No function assigned. Fix to "0."

2, 3

TCLK3S

00: BCLK/2 or BCLK/4 (Note 1)

TCLK3 input processing select bit

01: Rising edge

10: Falling edge

11: Both edges

No function assigned. Fix to "0."

5–7

TCLK2S

000: Disable input

TCLK2 input processing select bit

001: Rising edge

010: Falling edge

011: Both edges

100: "L" level

101: "L" level

110: "H" level

111: "H" level

No function assigned. Fix to "0."

9–11

TCLK1S

000: Disable input

TCLK1 input processing select bit

001: Rising edge

010: Falling edge

011: Both edges

100: "L" level

101: "L" level

110: "H" level

111: "H" level

12,13

No function assigned. Fix to "0."

14,15

TCLK0S

00: BCLK/2 or BCLK/4 (Note 1)

TCLK0 input processing select bit

01: Rising edge

10: Falling edge

11: Both edges110

Note 1: To select BCLK/2 or BCLK/4, use the PRS012CKS (prescaler 0-2, TML0,1 supplied clock select) bit of the Common Count

Clock Select Register (CNTCLKSEL). For details, refer to Section 10.2.2, “Common Count Clock Select Function.”

Note: • This register must always be accessed in halfwords.

b15

TCLK3S

TCLK2S

TCLK1S

TCLK0S

000

10.2 Common Units of Multijunction Timers

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