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4502 Datasheet(PDF) 166 Page - Renesas Technology Corp

Part # 4502
Description  4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES
PDF  214 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

4502 Datasheet(HTML) 166 Page - Renesas Technology Corp

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2.7 RAM back-up
2-49
4502 Group
APPLICATION
Rev.2.01
Feb 02, 2005
REJ09B0193-0201
2.7.3 Notes on use
(1)
Key-on wakeup function
After setting ports (P0, P1, D2/C, D3/K, P20/AIN0 and P21/AIN1 specified with register K0–K2) which
key-on wakeup function is valid to “H,” execute the POF or POF2 instruction.
If one of ports which key-on wakeup function is valid is in the “L” level state, system returns from
the RAM back-up after the POF or POF2 instruction is executed.
(2)
POF instruction, POF2 instruction
Execute the POF or POF2 instruction immediately after executing the EPOF instruction to enter the
RAM back-up state.
Note that system cannot enter the RAM back-up state when executing only the POF or POF2
instruction.
Be sure to disable interrupts by executing the DI instruction before executing the EPOF instruction
and the POF or POF2 instruction.
(3)
Return from RAM back-up
After system returns from RAM back-up, set the undefined registers and flags.
The initial value of the following registers are undefined at RAM back-up. After system is returned
from RAM back-up, set initial values.
• Register Z (2 bits)
• Register X (4 bits)
• Register Y (4 bits)
• Register D (3 bits)
• Register E (8 bits)
(4)
Watchdog timer
The watchdog timer function is valid after system is returned from the RAM back-up. When not using
the watchdog timer function, execute the DWDT instruction and the WRST instruction continuously
every system is returned from the RAM back-up, and stop the watchdog timer function.
(5)
P13/INT pin
When the bit 3 of register I1 is cleared, the RAM back-up mode is selected and the input of INT pin
is disabled, be careful about the following notes.
• When the key-on wakeup function of port P13 is not used (register K13 = “0”), clear bits 2 and 3
of register I1 before system enters to the RAM back-up mode.
(6)
External clock
When the external signal clock is used as the source oscillation (f(XIN)), note that the RAM back-
up mode (POF and POF2 instructions) cannot be used.



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