7721 datasheet(344/577 Pages) RENESAS

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13-65

DMA CONTROLLER

13.6 Repeat transfer mode

7721 Group User’s Manual

Fig. 13.6.4 Initial setting example for registers relevant to repeat transfer mode (3)

DMA transfer starts

0 0

0 : No request

Inputting DMA request

signal to DMAREQi pin

When selecting external

DMA source

From preceding “Figure 13.6.3”

Priority select bit

0 : Fixed

1 : Rotating

DMAC control register L (Address 6816)

pin validity bit

0 : Invalid

(P103 pin functions as a programmable I/O port.)

1 : Valid

(P103 pin functions as TC pin.)

DMA0 request bit

DMA1 request bit

DMA2 request bit

DMA3 request bit

Software DMAi request bit

(Valid in software DMA source selected)

Bit 0 : Channel 0

Bit 1 : Channel 1

Bit 2 : Channel 2

Bit 3 : Channel 3

0 : Disabled

1 : Enabled

DMAC control register H (Address 6916)

DMA0 enable bit

DMA1 enable bit

DMA2 enable bit

DMA3 enable bit

When selecting internal

DMA source

When selecting internal DMA

source except software

Interrupt request of

each peripheral

function occurs

DMAC control register H (Address 6916)

Software DMA0 request bit

Software DMA1 request bit

Software DMA2 request bit

Software DMA3 request bit

0 : No request

1 : Requested

When selecting software

DMA request

When writing “1,” DMA request is generated.

Note: When the burst transfer mode (edge sense) is selected, set bit 1 to “1.”

Selection of priority level and TC pin, and setting DMAi request bit to “0”

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