Electronic Components Datasheet Search
  English  ▼

X  

7721 Datasheet(PDF) 537 Page - Renesas Technology Corp

Part # 7721
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  577 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7721 Datasheet(HTML) 537 Page - Renesas Technology Corp

Back Button 7721 Datasheet HTML 533Page - Renesas Technology Corp 7721 Datasheet HTML 534Page - Renesas Technology Corp 7721 Datasheet HTML 535Page - Renesas Technology Corp 7721 Datasheet HTML 536Page - Renesas Technology Corp 7721 Datasheet HTML 537Page - Renesas Technology Corp 7721 Datasheet HTML 538Page - Renesas Technology Corp 7721 Datasheet HTML 539Page - Renesas Technology Corp 7721 Datasheet HTML 540Page - Renesas Technology Corp 7721 Datasheet HTML 541Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 537 / 577 page
background image
APPENDIX
Appendix 9. 7721 Group Q & A
7721 Group User’s Manual
17–74
A
In the wait mode, DRAM refresh function does not operate, but the watchdog timer, timer A, and
timer B operate. Accordingly, DRAM can be refreshed by using these timers and ports.
(1) Method using watchdog timer
Return from the wait mode by the watchdog
timer interrupt. Control ports P104, P105 by
____
____
software and perform the CAS-before-RAS-
refresh.
Example 1: A case in 1024 refresh cycles, every 16.4 ms, f(XIN) = 16 MHz, watchdog timer
count source = f32
•DRAM refresh is performed 256 times. This refresh is performed by every
watchdog timer interrupt. (See flow chart Œ.)
Interval of watchdog timer interrupt
f(XIN)
25 MHz
16 MHz
f32 selected
2.621 ms
4.096 ms
f512 selected
41.943 ms
65.536 ms
(1/2)
DRAM validity bit
(bit 7 at address 6416)
Bits 4, 5 of port P10 register
(address 1616)
← “1”
WIT instruction
Wait mode completed ?
N
Y
Wait mode
DRAMC stopped
Watchdog timer count
source: f32 selected
Ports P104, P105:
“H” level output
Note: By using 1 bit of RAM, judge
whether this interrupt is for return
from the wait mode or for refresh.
256 times ?
N
Y
RTI
Return to main routine
← “1”
Bits 4, 5 of port P10 direction
register (address 1816)
← “1”
← “0”
Watchdog timer frequency
select bit (bit 0 at address 6116)
Main routine
Flow chart Œ
Watchdog timer
interrupt routine
← “0”
Bit 4 of port P10 register
(address 1616)
← “0”
Bit 5 of port P10 register
(address 1616)
← “1”
Bit 4 of port P10 register
(address 1616)
← “1”
Bit 5 of port P10 register
(address 1616)
Port P105 (RAS)
“H” level output
Port P104 (CAS):
“H” level output
Port P105 (RAS):
“L” level output
Port P104 (CAS):
“L” level output
Port P105 (RAS):
“H” level output



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com