7721 datasheet(208/577 Pages) RENESAS

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SERIAL I/O

7721 Group User’s Manual

11–5

(1)

Internal/External clock select bit (bit 3)

s Clock synchronous serial I/O mode

By clearing this bit to “0” in order to select an internal clock, the clock which is selected with the

BRG count source select bits (bits 0 and 1 at addresses 3416, 3C16) becomes the count source of

the BRGi (described later). The BRGi’s output divided by 2 becomes the transfer clock. Additionally,

the transfer clock is output from the CLKi pin.

By setting this bit to “1” in order to select an external clock, the clock input to the CLKi pin

becomes the transfer clock.

s UART mode

By clearing this bit to “0” in order to select an internal clock, the clock which is selected with the

BRG count source select bits (bits 0 and 1 at addresses 3416, 3C16) becomes the count source of

the BRGi (described later). Then, the CLKi pin functions as a programmable I/O port.

By setting this bit to “1” in order to select an external clock, the clock input to the CLKi pin

becomes the count source of BRGi.

Always in the UART mode, the BRGi’s output divided by 16 becomes the transfer clock.

11.2 Block description

7721 Datasheet(PDF) 208 Page - Renesas Technology Corp