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7721 Datasheet(PDF) 230 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 230 Page - Renesas Technology Corp |
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230 / 577 page ![]() SERIAL I/O 7721 Group User’s Manual 11–27 11.3 Clock synchronous serial I/O mode 11.3.5 Receive operation In the case of selecting an internal clock, when the receive conditions described in section “11.3.4 Method of reception” are satisfied, a transfer clock is generated and the reception is started after 1 cycle of the transfer clock has passed. In the case of selecting an external clock, when the receive conditions are satisfied, the UARTi enters the receive enable state and reception is started by input of an external clock to the CLKi pin. ____ In the case of selecting an external clock and the RTS function, when the UARTi enters the receive enable ____ state, the RTSi pin’s output level becomes “L” to inform the transmitter side that reception is enabled. When ____ ____ reception is started, the RTSi pin’s output level becomes “H.” Accordingly, by connecting the RTSi pin to ____ the CTSi pin of the transmitter side, the timing of transmission and that of reception can be matched. When ____ ____ an internal clock is selected, do not use the RTS function. It is because the RTS output becomes undefined. Figure 11.3.10 shows a connection example. The receive operations are described below: The input signal of the RxDi pin is taken into the most significant bit of the UARTi receive register synchronously with the rising edge of the transfer clock. The contents of the UARTi receive register are shifted by 1 bit to the right. Steps and are repeated at each rising edge of the transfer clock. When 1-byte data is prepared in the UARTi receive register, the contents of this register are transferred to the UARTi receive buffer register. Simultaneously with step , the receive complete flag is set to “1,” and a UARTi receive interrupt request occurs and its interrupt request bit is set to “1.” The receive complete flag is cleared to “0” when the low-order byte of the UARTi receive buffer register ____ is read out. The RTSi pin outputs “H” level until the receive conditions are next satisfied (when selecting ____ the RTS function). Figure 11.3.11 shows the receive operation, and Figure 11.3.12 shows an example of receive timing (when selecting an external clock). Fig. 11.3.10 Connection example TxDi RxDi CLKi TxDi RxDi CLKi Transmitter side Receiver side CTSi RTSi |
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