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7721 Datasheet(PDF) 297 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 297 Page - Renesas Technology Corp |
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297 / 577 page  7721 Group User’s Manual 13-18 DMA CONTROLLER 13.2 Block description 13.2.14 Port P9 direction register _________ I/O pins of DMAi are multiplexed with port P9. When using these pins as the DMAREQi input pins, set the corresponding bits of the port P9 direction register to “0” to set these port pins for the input mode. When _________ _________ using these pins as the DMAACKi output pins, these pins are forcibly set to the DMAACKi output pins regardless of the direction register’s contents. Figure 13.2.10 shows the relationship between the port P9 direction register and DMAi’s I/O pins. Bit Corresponding pin Functions 0 1 2 3 4 5 6 7 DMAACK0 pin 0 : Input mode 1 : Output mode When using pins P91, P93, P95 and P97 as DMAREQi input pins,set the corresponding bits to “0.” Port P9 direction register (Address 1516) b1 b0 b2 b3 b4 b5 b6 b7 At reset RW 0 0 0 0 0 0 0 0 RW RW RW RW RW RW RW RW DMAREQ0 pin DMAACK1 pin DMAREQ1 pin DMAACK2 pin DMAREQ2 pin DMAACK3 pin DMAREQ3 pin Fig. 13.2.10 Relationship between port P9 direction register and DMAi’s I/O pins [Precautions for DMAC] Do not access the registers relevant to DMAC by using DMA transfers; the address of the accessing register collides with that of the accessed one on the DMAC internal bus. |
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